ATA5279P-PLQW Atmel, ATA5279P-PLQW Datasheet - Page 21

• Manufacturer Part Number: ATA5279P-PLQW
• Description: IC ANTENNA DVR SIX-FOLD 48QFN
• Manufacturer: Atmel

Specifications of ATA5279P-PLQW

• Rf Type: PEG, TPMS
• Frequency: 125kHz
• Features: RSSI Equipped
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.9.2
9125L–RKE–03/11
General Command Description
The following commands are directly processed by the control logic, i.e., they are not fed into
the data buffer:
Table 3-6.
Refer to
Command
Get status info
Get driver setup
Get fault info
Reset fault status
Set SPI config
Halt operation
• Get Status Info:
• Possible sources include the diagnosis block to indicate a driver stage fault (bit F), a
This command delivers the general IC status information back to the microcontroller (via
the SPI bus). One part of the return word is the interrupt request source. If such a request
is active (i.e., the IRQ line is high), the source for it is coded here.
general reset (either triggered externally by the NRES pin or internally by the power-on
reset structure, bit R), an overtemperature of the chip (bit T), or the FIFO buffer indicating
that the fill state has dropped to 25% or below (i.e., only four words are left, bit BU), or the
fill state exceeds the upper limit of 16 bytes (bit BO). The IRQ signal is reset with this
command. Additionally, the operability flag of the IC (bit Op) is returned in the word. Note
that only if no fault is stored in the fault register and all operation voltages are present and
valid, the operability is given (indicated by a 1 in the Op bit). Otherwise, Atmel
will not process any driver-related command. Finally, the LF speed mode bit returned here
indicates the current speed state of the modulator stage (bit S, 0 for normal speed, 1 for
high speed).
bit R:
bit F:
bit BO:
bit BU:
bit T:
bit S:
bit Op
Section 3.7 “SPI” on page 13
Bit Definitions of the General SPI Commands
Chip reset - either triggered externally by the NRES pin or internally by the
power on reset structure
Indicator for a driver stage fault
The FIFO buffer fill state exceeds the upper limit of 16 bytes
The FIFO buffer fill state drops to 25% or below, i.e., only 4 words are left
Chip overtemperature indicator
LF modulator speed mode indicator
LF driver stage operability indicator
0
X
0
X
0
X
0
0
0
X
X
X
6
1
1
1
1
1
1
Input Word (MOSI Data)
X
X
X
5
1
1
1
0
0
0
X
X
X
4
0
0
1
0
0
1
for bit direction definitions.
X
X
X
3
0
1
0
0
1
0
2
0
X
0
X
0
X
0
0
0
PO PH
X
X
X
1
0
0
0
0
0
X
X
X
0
0
0
0
0
D
C
R
X
X
X
X
X
X
G
4
C
D
Output Word (MISO Data)
X
X
X
X
X
X
6
F
Atmel ATA5279
3
1
BO
C
D
X
X
X
X
X
X
5
2
0
BU
C
X
X
X
X
X
X
4
T
1
F
C
X
T
X
X
X
X
X
3
03
0
®
F
D
2
X
S
X
X
X
X
X
02
ATA5279
G
Op
F
D
X
X
X
X
X
X
1
01
1
F
D
X
X
X
X
X
X
X
21
00
0