NUC120RD1BN Nuvoton Technology Corporation of America, NUC120RD1BN Datasheet - Page 490

• Manufacturer Part Number: NUC120RD1BN
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™r

Specifications of NUC120RD1BN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.16.4.5 Continuous Scan Mode
In continuous scan mode, A/D conversion is performed sequentially on the specified channels
that enabled by CHEN bits in ADCHER register (maximum 8 channels for ADC). The operations
are as follows:
An example timing diagram for continuous scan on enabled channels (0, 2, 3 and 7) is shown as
below:
1.
2.
3.
4.
When the ADST bit in ADCR is set to 1 by software or external trigger input, A/D
conversion starts on the channel with the lowest number.
When A/D conversion for each enabled channel is completed, the result of each enabled
channel is stored in the A/D data register corresponding to each enabled channel.
When all enabled channel sequentially completes A/D converting once, the ADF bit
(ADSR[0]) will be set to 1. If the ADIE bit is set to 1 at this time, an ADC_INT interrupt is
requested after A/D conversion ends. Conversion of the 1st enabled channel starts
again.
Steps 2 to 3 are repeated as long as the ADST bit remains enable. When ADST is
cleared to 0, ADC controller will finish current conversion and the result of the lowest
enabled ADC channel will become unpredictable.
NuMicro™ NUC100 Series Technical Reference Manual
Figure 5-99 Continuous Scan on Enabled Channels Timing Diagram
- 490 -
Publication Release Date: Dec. 22, 2010
Revision V1.06