NUC120RD1BN Nuvoton Technology Corporation of America, NUC120RD1BN Datasheet - Page 523

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NUC120RD1BN

Manufacturer Part Number
NUC120RD1BN
Description
IC MCU 32BIT 64KB FLASH 64LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Datasheets

Specifications of NUC120RD1BN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
45
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NUC120RD1BN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
PDMA Transfer Destination Address Register (PDMA_DARx)
Register
PDMA_DAR0
PDMA_DAR1
PDMA_DAR2
PDMA_DAR3
PDMA_DAR4
PDMA_DAR5
PDMA_DAR6
PDMA_DAR7
PDMA_DAR8
Notice: Low Density only support PDMA channel 0.
Bits
[31:0]
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Descriptions
PDMA_DAR
Offset
PDMA_BA_ch0+0x08
PDMA_BA_ch1+0x08
PDMA_BA_ch2+0x08
PDMA_BA_ch3+0x08
PDMA_BA_ch40x08
PDMA_BA_ch5+0x08
PDMA_BA_ch6+0x08
PDMA_BA_ch7+0x08
PDMA_BA_ch8+0x08
30
22
14
6
PDMA Transfer Destination Address Register
This field indicates a 32-bit destination address of PDMA.
Note : The destination address must be word alignment
29
21
13
5
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PDMA_DAR [31:24]
PDMA_DAR [23:16]
PDMA_DAR [15:8]
PDMA_DAR [7:0]
Description
PDMA Transfer Destination Address Register CH0
PDMA Transfer Destination Address Register CH1
PDMA Transfer Destination Address Register CH2
PDMA Transfer Destination Address Register CH3
PDMA Transfer Destination Address Register CH4
PDMA Transfer Destination Address Register CH5
PDMA Transfer Destination Address Register CH6
PDMA Transfer Destination Address Register CH7
PDMA Transfer Destination Address Register CH8
28
20
12
4
- 523 -
27
19
11
3
Publication Release Date: Oct 22, 2010
26
18
10
2
25
17
9
1
Revision V1.06
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
24
16
8
0

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