PK10N512VMD100 Freescale Semiconductor, PK10N512VMD100 Datasheet

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PK10N512VMD100

Manufacturer Part Number
PK10N512VMD100
Description
IC ARM CORTEX MCU 512K 144-MAP
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Datasheets

Specifications of PK10N512VMD100

Core Processor
ARM Cortex-M4
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SDHC, SPI, UART/USART
Peripherals
DMA, I²S, LVD, POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 37x16b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LBGA
Processor Series
Kinetis
Core
ARM Cortex M4
Data Ram Size
128 KB
Interface Type
UART, SPI, I2C, I2S, CAN
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
104
Operating Supply Voltage
1.71 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PK10N512VMD100
Manufacturer:
FSL
Quantity:
180
Freescale Semiconductor
Data Sheet: Product Preview
K10 Sub-Family Data Sheet
Supports the following:
MK10X128VLQ100,
MK10X128VMD100,
MK10X256VLQ100,
MK10X256VMD100,
MK10N512VLQ100,
MK10N512VMD100
Features
• Operating Characteristics
• Performance
• Memories and memory interfaces
• Clocks
• System peripherals
This document contains information on a product under development. Freescale
reserves the right to change or discontinue this product without notice.
© 2010–2011 Freescale Semiconductor, Inc.
Preliminary
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
– Up to 100 MHz ARM Cortex-M4 core with DSP
– Up to 512 KB program flash memory on non-
– Up to 256 KB program flash memory on
– Up to 256 KB FlexNVM on FlexMemory devices
– 4 KB FlexRAM on FlexMemory devices
– Up to 128 KB RAM
– Serial programming interface (EzPort)
– FlexBus external bus interface
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
– 10 low-power modes to provide power optimization
– Memory protection unit with multi-master
– 16-channel DMA controller, supporting up to 64
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
instructions delivering 1.25 Dhrystone MIPS per
MHz
FlexMemory devices
FlexMemory devices
based on application requirements
protection
request sources
• Security and integrity modules
• Human-machine interface
• Analog modules
• Timers
• Communication interfaces
– Hardware CRC module to support fast cyclic
– 128-bit unique identification (ID) number per chip
– Low-power hardware touch sensor interface (TSI)
– General-purpose input/output
– Two 16-bit SAR ADCs
– Programmable gain amplifier (up to x64) integrated
– Two 12-bit DACs
– Three analog comparators (CMP) containing a 6-bit
– Voltage reference
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
– Two 2-channel quadrature decoder/general purpose
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
– Two Controller Area Network (CAN) modules
– Three SPI modules
– Two I2C modules
– Six UART modules
– Secure Digital host controller (SDHC)
– I2S module
redundancy checks
into each ADC
DAC and programmable reference input
timer
timers
K10P144M100SF2
Document Number: K10P144M100SF2
Rev. 4, 3/2011

Related parts for PK10N512VMD100

PK10N512VMD100 Summary of contents

Page 1

... External watchdog monitor – Software watchdog – Low-leakage wakeup unit This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © 2010–2011 Freescale Semiconductor, Inc. Preliminary Document Number: K10P144M100SF2 Rev. 4, 3/2011 K10P144M100SF2 • ...

Page 2

... K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 2 Preliminary Freescale Semiconductor, Inc. ...

Page 3

... Device clock specifications...................................18 5.2.2 General switching specifications...........................19 5.3 Thermal specifications.......................................................19 5.3.1 Thermal operating requirements...........................19 K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Table of Contents 5.3.2 Thermal attributes.................................................20 6 Peripheral operating requirements and behaviors....................20 6.1 Core modules....................................................................20 6.1.1 Debug trace timing specifications.........................20 6 ...

Page 4

... K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 4 http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K10 • Program flash only • Program flash and FlexMemory Table continues on the next page... Preliminary and perform a part number Values Freescale Semiconductor, Inc. ...

Page 5

... An operating requirement is a specified value or range of values for a technical characteristic that you must guarantee during operation to avoid incorrect operation and possibly decreasing the useful life of the chip. K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Description • • • ...

Page 6

... Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 6 Min. Max. 0.9 1.1 Min. Max. 10 130 Min. Max. — 7 Preliminary Unit V Unit µA Unit pF Freescale Semiconductor, Inc. ...

Page 7

... Result of exceeding a rating Measured characteristic K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Preliminary Terminology and guidelines Max ...

Page 8

... This is an example of an operating behavior that includes a typical value: K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 8 Normal Limited operating operating range range - No permanent failure - No permanent failure - Correct operation - Possible decreased life - Possible incorrect operation Handling range - No permanent failure Preliminary Fatal range - Probable permanent failure ∞ Freescale Semiconductor, Inc. ...

Page 9

... Typical value conditions Typical values assume you meet the following conditions (or other conditions as specified): Symbol T Ambient temperature A V 3.3 V supply voltage DD 4 Ratings K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Typ 1.00 1.05 1.10 V (V) DD Description ...

Page 10

... Table continues on the next page... Preliminary Max. Unit Notes 150 °C 1 260 °C 2 245 Max. Unit Notes 3 — 1 Max. Unit Notes +2000 V 1 +500 V 2 +100 mA Min. Max. Unit –0.3 3.8 V — 185 mA –0.3 5.5 V Freescale Semiconductor, Inc. ...

Page 11

... V < voltage required to retain RAM RAM voltage required to retain the VBAT register file RFVBAT BAT K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. –0.3 –25 V – 0.3 DD –0.3 Min. Max. 1.71 3.6 1.71 3.6 –0.1 0.1 – ...

Page 12

... Typ. Max. Unit Notes 1.1 TBD V 2.56 TBD V 2.70 TBD V 2.80 TBD V 2.90 TBD V 3.00 TBD 1.60 TBD V 1.80 TBD V 1.90 TBD V 2.00 TBD V 2.10 TBD 1.00 TBD V 1000 TBD μs Typ. Max. Unit Notes 1.1 TBD V Freescale Semiconductor, Inc. . The ...

Page 13

... Power mode transition operating behaviors All specifications except t POR assume this clock configuration: • CPU and system clocks = 100 MHz • Bus and FlexBus clocks = 50 MHz • Flash clock = 25 MHz K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. = -10mA V – 0 -3mA V – ...

Page 14

... Table continues on the next page... Preliminary Max. Unit Notes 300 μs 1 4.1 μs 123.8 μs 4.1 μs 49.3 μs 4.1 μs 49.2 μs 4.1 μs 5.9 μs 4.1 μs 4.2 μs 4.1 μs 5.8 μs Max. Unit Notes TBD TBD mA TBD mA Freescale Semiconductor, Inc. ...

Page 15

... MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for fast IRCLK mode. All peripheral clocks enabled but peripherals are not in active operation. Code executing from flash. K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Typ. ...

Page 16

... The following data was measured under these conditions: • MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE) • All peripheral clocks enabled but peripherals are not in active operation K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 16 Preliminary Freescale Semiconductor, Inc. ...

Page 17

... RE2 V Radiated emissions voltage, band 3 RE3 V Radiated emissions voltage, band 4 RE4 V IEC and SAE level RE_IEC_SAE K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Frequency Typ. band (MHz) 0.15–50 TBD 50–150 TBD 150–500 TBD 500–1000 TBD 0.15– ...

Page 18

... MHz SYS Table 8. Capacitance attributes Min. Normal run mode — — — — VLPR mode — — Table continues on the next page... Preliminary Min. Max. Unit — — Max. Unit Notes 100 MHz 50 MHz 50 MHz 25 MHz 2 MHz 2 MHz Freescale Semiconductor, Inc. ...

Page 19

... Thermal specifications 5.3.1 Thermal operating requirements Table 9. Thermal operating requirements Symbol Description T Die junction temperature J T Ambient temperature A K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Max. — 2 — 1 Min. Max. 1.5 — 100 — ...

Page 20

... Symbol Description T Clock period cyc K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 20 144 LQFP Frequency dependent Table continues on the next page... Preliminary 144 Unit Notes MAPBGA 50 °C °C °C °C °C °C °C/W 4 Min. Max. Unit MHz Freescale Semiconductor, Inc. ...

Page 21

... TCLK frequency of operation • Boundary Scan • JTAG and CJTAG • Serial Wire Debug J2 TCLK cycle period K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Ts Th Table continues on the next page... Preliminary Min. ...

Page 22

... Table continues on the next page... Preliminary Min. Max. Unit ns 50 — 20 — 10 — — — ns — — — — ns — — 100 — — ns Min. Max. Unit 1.71 3.6 V MHz 1/J1 — — 25 — 12.5 — — — ns — — — ns Freescale Semiconductor, Inc. ...

Page 23

... TRST setup time (negation) to TCLK high TCLK (input) TCLK Data inputs Data outputs Data outputs Data outputs Figure 6. Boundary scan (JTAG) timing K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Figure 5. Test clock input timing J7 J8 ...

Page 24

... There are no specifications necessary for the device's system modules. 6.3 Clock modules K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 24 J11 J12 J11 Figure 7. Test Access Port timing J14 Figure 8. TRST timing Preliminary J9 J10 Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...

Page 25

... DCO output Low range (DRS=00) dco frequency range Mid range (DRS=01) Mid-high range (DRS=10) High range (DRS=11) K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table 13. MCG specifications Min. — 32.768 31.25 — ...

Page 26

... Preliminary Typ. Max. Unit Notes — MHz 4, — MHz — MHz — MHz TBD ps TBD ps — — 100 MHz 950 — µA — 4.0 MHz 400 — — — ± 2.98 % — ± 5.97 % — 0. 1075( pll_ref Freescale Semiconductor, Inc ...

Page 27

... Feedback resistor — low-frequency, high-gain mode (HGO=1) Feedback resistor — high-frequency, low-power mode (HGO=0) Feedback resistor — high-frequency, high-gain mode (HGO=1) K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 1.71 — — ...

Page 28

... Table continues on the next page... Preliminary Typ. Max. Unit Notes — — kΩ 200 — kΩ — — kΩ 0 — kΩ 0.6 — — 0.6 — — Typ. Max. Unit Notes — 40 kHz — 8 MHz — 32 MHz — 50 MHz Freescale Semiconductor, Inc. 1 ...

Page 29

... Oscillator crystal osc_lo t Crystal start-up time start 1. Proper PC board layout procedures must be followed to achieve specifications. 6.4 Memories and memory interfaces K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. Max. — TBD — ...

Page 30

... Table continues on the next page... Preliminary Max. Unit Notes TBD μs 100 ms 1 800 ms 1 Max. Unit Notes 1 μ μ μs 1 TBD μs 2 800 ms 100 ms 2 TBD ms TBD ms TBD ms 2 μs 1 TBD μs Freescale Semiconductor, Inc. ...

Page 31

... Maximum times for erase parameters based on expectations at cycling end-of-life. 3. For byte-writes to an erased FlexRAM location, the aligned word containing the byte must be erased. K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — ...

Page 32

... Unit 10 mA Max. Unit Notes — years 2 — years 2 — years 2 — cycles 3 — years 2 — years 2 — years 2 — cycles 3 — years 2 — years 2 — years 2 4 — writes — writes — writes — writes — writes Freescale Semiconductor, Inc. ...

Page 33

... FlexRAM • 0.50 for 16-bit or 32-bit writes to FlexRAM • n — data flash cycling endurance nvmcycd K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EEESPLIT × EEESIZE Preliminary × Write_efficiency × n nvmcycd ...

Page 34

... EZP_CK low to EZP_Q output invalid (hold) EP9 EZP_CS negation to EZP_Q tri-state K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 34 Min. 2.7 — — EZP_CK — 0 — Preliminary Max. Unit 3 MHz SYS f /8 MHz SYS — ns — ns — ns — ns — — Freescale Semiconductor, Inc. ...

Page 35

... Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EP3 EP2 EP4 ...

Page 36

... FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 11. FlexBus read timing diagram K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 36 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Preliminary Freescale Semiconductor, Inc. ...

Page 37

... Figure 12. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data ...

Page 38

... Table continues on the next page... Preliminary are achievable on the Table 26 and Max. Unit Notes 3.6 V +100 mV 2 +100 DDA V V SSA V V REFH kΩ kΩ 4 18.0 MHz 5 12.0 MHz Freescale Semiconductor, Inc. ...

Page 39

... For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 7. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Max. ...

Page 40

... CHANNEL SELECT CIRCUIT ADC SAR ENGINE R ADIN R ADIN R ADIN R ADIN C ADIN , REFL SSA 2 Max. Unit Notes 1 — MHz ADACK f ADACK — MHz — MHz — MHz ±TBD ADC 4 LSB conversion ±1 clock <12MHz, Max hardware averaging (AVGE = %1, AVGS = %11) Freescale Semiconductor, Inc. ...

Page 41

... Avg=32 SFDR Spurious free 16 bit differential mode dynamic range • Avg=32 16 bit single-ended mode • Avg=32 K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = REFH DDA REFL 1 Min. Typ. ...

Page 42

... VREFOUT VREFOUT VREFOUT V — SSA V — SSA Table continues on the next page... Preliminary = V ) (continued) SSA 2 Max. Unit Notes leakage current (refer to the MCU's voltage and current operating ratings) — mV/°C — mV/°C — mV Max. Unit Notes 3 DDA V V DDA Freescale Semiconductor, Inc. ...

Page 43

... PGAG=5 • PGAG=6 BW Input signal • 16-bit modes bandwidth • < 16-bit modes PSRR Power supply Gain=1 rejection ration K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. — 128 — 64 — 32 — ...

Page 44

... DDA to 3.6V TBD %/ leakage AS In current (refer to the MCU's voltage and current operating ratings × 0.583 — dB 16-bit differential — dB mode, Average=32 — dB 16-bit differential — dB mode, Average=32, f =500Hz in — dB 16-bit differential — dB mode, Average=32, f =500Hz in Freescale Semiconductor, Inc. ...

Page 45

... I Supply current, low-speed mode (EN=1, PMODE=0) DDLS V Analog input voltage AIN V Analog input offset voltage AIO K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. TBD 12.3 TBD 12.7 TBD 8.4 TBD 8 ...

Page 46

... V – 0.5 DD — 20 120 — 2 — –0.5 –0.3 -0.6V. DD Preliminary Typ. Max. Unit 5 — — — — mV — — V — 0 200 ns 250 600 ns — TBD ns 7 — μA — 0.5 3 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...

Page 47

... Figure 16. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) Preliminary HYSTCTR S etting 00 ...

Page 48

... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 −40 — — Preliminary HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 105 °C 100 Freescale Semiconductor, Inc. ...

Page 49

... LP 1. Settling within ±1 LSB 2. The INL is measured for 0+100mV The DNL is measured for 0+100 The DNL is measured for 0+100mV to V K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — ...

Page 50

... Peripheral operating requirements and behaviors 5. Calculated by a best fit curve from V Figure 18. Typical INL error vs. digital code K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 50 +100 mV to VREF−100 mV SS Preliminary Freescale Semiconductor, Inc. ...

Page 51

... Table 32. VREF full-range operating behaviors Symbol Description V Voltage reference output with factory trim at out nominal V and temperature=25C DDA K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 −40 — Min. Typ. TBD 1.2 Table continues on the next page ...

Page 52

... Typ. Max. Unit Notes — TBD V — 1.202 V 0.5 — mV — See Figure 20 — TBD ppm/year — TBD µA — 1.1 mA — TBD V — 100 µs — TBD mV — TBD dB Max. Unit Notes 50 °C Max. Unit Notes TBD V Freescale Semiconductor, Inc. ...

Page 53

... DSPI_PCSn DS3 DSPI_SCK DS7 (CPOL=0) DSPI_SIN DSPI_SOUT Figure 22. DSPI classic SPI timing — master mode K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 — BCLK (t / SCK ...

Page 54

... Table continues on the next page... Preliminary Min. Max. Unit 1.71 3.6 V — 6.25 MHz — ns BCLK (t / SCK SCK/2) — — — — ns — — DS9 DS16 DS11 Last data Last data Min. Max. Unit 2.7 3.6 V — 25 MHz Freescale Semiconductor, Inc. ...

Page 55

... DSPI_SIN to DSPI_SCK input setup DS14 DSPI_SCK to DSIP_SIN input hold DS15 DSPI_SS active to DSPI_SOUT driven DS16 DSPI_SS inactive to DSPI_SOUT not driven K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS1 DS2 DS8 Data Last data ...

Page 56

... First data Data DS14 First data Data Card input clock Table continues on the next page... Preliminary DS9 DS16 DS11 Last data Last data Min. Max. Unit 2.7 3 400 kHz 0 25 MHz 0 20 MHz 0 400 kHz 7 — — ns — Freescale Semiconductor, Inc. ...

Page 57

... Table 40. I Num Description Operating voltage S1 I2S_MCLK cycle time K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors (continued) SD3 SD2 SD1 SD6 SD7 SD8 Figure 26 ...

Page 58

... Table continues on the next page... Preliminary Min. Max. Unit 45% 55% MCLK period — ns SYS 45% 55% BCLK period — -2.5 — ns — — — — S10 S8 Min. Max. Unit 2.7 3 — ns SYS 45% 55% MCLK period 10 — — ns — — — ns Freescale Semiconductor, Inc. ...

Page 59

... ELE Pres5 Electrode capacitance measurement precision Pres20 Electrode capacitance measurement precision Pres100 Electrode capacitance measurement precision K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 2 S slave mode timing (continued) S11 S12 S15 S16 ...

Page 60

... TBD — μA, REFCHRG = 4 128, REF http://www.freescale.com and perform a keyword Then use this document number 98ASS23177W 98ASA00222D Preliminary Max. Unit Notes — fF/count 6 — fF/count 7 16 bits 25 μs 8 — μA TBD μA Freescale Semiconductor, Inc. ...

Page 61

... ADC0_SE4 ADC0_SE4 PTE17 ADC0_SE5 ADC0_SE5 PTE18 ADC0_SE6 ADC0_SE6 a a K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE0 SPI1_PCS1 UART1_TX SDHC0_D1 PTE1 SPI1_SOUT UART1_RX SDHC0_D0 PTE2 SPI1_SCK UART1_CT SDHC0_DC S_b LK PTE3 SPI1_SIN UART1_RT SDHC0_CM ...

Page 62

... ADC0_SE2 ADC0_SE2 DAC1_OUT/ DAC1_OUT DAC1_OUT/ CMP2_IN3/ CMP2_IN3/ ADC1_SE2 ADC1_SE2 XTAL32 XTAL32 XTAL32 41 M6 EXTAL32 EXTAL32 EXTAL32 K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 62 ALT1 ALT2 ALT3 ALT4 PTE19 SPI0_SIN UART2_RT I2C0_SCL S_b Preliminary ALT5 ALT6 ALT7 EzPort Freescale Semiconductor, Inc. ...

Page 63

... L9 PTA11 DISABLED 64 K9 PTA12 CMP2_IN0 CMP2_IN0 65 J9 PTA13 CMP2_IN1 CMP2_IN1 66 L10 PTA14 DISABLED K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE24 CAN1_TX UART4_TX PTE25 CAN1_RX UART4_RX PTE26 UART4_CT S_b PTE27 UART4_RT S_b PTE28 ...

Page 64

... PTB3 I2C0_SDA UART0_CT S_b PTB4 PTB5 PTB6 PTB7 PTB8 UART3_RT S_b Preliminary ALT5 ALT6 ALT7 EzPort I2S0_RXD I2S0_RX_F S I2S0_MCLK I2S0_CLKIN LPT0_ALT1 FB_A29 FB_A28 FB_A27 FB_A26 FB_A25 FB_A24 FTM1_QD_ PHA FTM1_QD_ PHB FTM0_FLT3 FTM0_FLT0 FTM1_FLT0 FTM2_FLT0 FB_AD23 FB_AD22 FB_AD21 Freescale Semiconductor, Inc. ...

Page 65

... B8 PTC7 /CMP0_IN1 /CMP0_IN1 113 A8 PTC8 / / ADC1_SE4 ADC1_SE4 b/ b/ CMP0_IN2 CMP0_IN2 K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTB9 SPI1_PCS1 UART3_CT S_b PTB10 SPI1_PCS0 UART3_RX PTB11 SPI1_SCK UART3_TX PTB16 SPI1_SOUT UART0_RX SPI1_SIN UART0_TX ...

Page 66

... S_b Preliminary ALT5 ALT6 ALT7 EzPort FB_AD6 FTM2_FLT0 FB_AD5 FB_RW_b FB_AD27 FB_AD26 FB_AD25 FB_AD24 FB_CS5_b/ FB_TSIZ1/ FB_BE23_1 6_BLS15_8 _b FB_CS4_b/ FB_TSIZ0/ FB_BE31_2 4_BLS7_0_ b FB_TBST_b /FB_CS2_b/ FB_BE15_8 _BLS23_16 _b FB_CS3_b/ FB_TA_b FB_BE7_0_ BLS31_24_ b FB_ALE/ FB_CS1_b/ FB_TS_b FB_CS0_b FB_AD4 FB_AD3 FB_AD2 EWM_IN Freescale Semiconductor, Inc. ...

Page 67

... The below figure shows the pinout diagram for the devices supported by this document. Many signals may be multiplexed onto a single pin. To determine what signals can be used on which pin, see the previous section. K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ...

Page 68

... PTB22 100 PTB21 PTB20 99 98 PTB19 PTB18 97 96 PTB17 PTB16 95 VDD 94 VSS 93 PTB11 92 PTB10 91 PTB9 90 PTB8 89 PTB7 88 PTB6 87 PTB5 86 85 PTB4 PTB3 84 83 PTB2 PTB1 82 81 PTB0 PTA29 80 79 PTA28 PTA27 78 PTA26 77 PTA25 76 75 PTA24 RESET_b 74 PTA19 73 Freescale Semiconductor, Inc. ...

Page 69

... ADC0_DM3 ADC1_SE18 Figure 30. K10 144 MAPBGA Pinout Diagram 9 Revision History The following table provides a revision history for this document. Rev. No. Date 1 11/2010 K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc PTC8 PTD0 PTC16 PTC12 PTC19 PTC15 PTC11 PTC7 ...

Page 70

... Many updates throughout Added sections that were inadvertently removed in previous revision Reworded I footnote in "Voltage and Current Operating Requirements" IC table. Added paragraph to "Peripheral operating requirements and behaviors" section. Added "JTAG full voltage range electricals" table to the "JTAG electricals" section. Preliminary Freescale Semiconductor, Inc. ...

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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...

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