PK30N512VMD100 Freescale Semiconductor, PK30N512VMD100 Datasheet - Page 15

• Manufacturer Part Number: PK30N512VMD100
• Description: IC ARM CORTEX MCU 512K 144-MAP
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr

Specifications of PK30N512VMD100

• Core Processor: ARM Cortex-M4
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SDHC, SPI, UART/USART
• Peripherals: DMA, I²S, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 102
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 37x16b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LBGA
• Processor Series: Kinetis
• Core: ARM Cortex M4
• Data Ram Size: 128 KB
• Interface Type: UART, SPI, I2C, I2S, CAN
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 102
• Operating Supply Voltage: 1.71 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

1. The analog supply current is the sum of the active or disabled current for each of the analog modules on the device. See
2. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock . MCG configured for FEI mode.
3. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock. MCG configured for FEI mode. All
4. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock. MCG configured for FEI mode. All
5. 25MHz core and system clock, 25MHz bus clock, and 12.5MHz FlexBus and flash clock. MCG configured for FEI mode.
6. 2 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for fast IRCLK mode. All peripheral
7. 2 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for fast IRCLK mode. All peripheral
Freescale Semiconductor, Inc.
I
I
I
I
DD_RUN_M
I
I
I
I
I
I
I
I
DD_VLLS3
DD_VLLS2
DD_VLLS1
Symbol
I
DD_VLPW
DD_STOP
DD_VLPR
DD_VLPR
DD_VBAT
DD_WAIT
DD_WAIT
DD_VLPS
I
DD_RUN
DD_LLS
each module's specification for its supply current.
All peripheral clocks disabled.
peripheral clocks enabled, but peripherals are not in active operation.
peripheral clocks enabled, and peripherals are in active operation.
clocks disabled. Code executing from flash.
clocks enabled but peripherals are not in active operation. Code executing from flash.
AX
Run mode current — all peripheral clocks
enabled, code executing from flash
Run mode current — all peripheral clocks
enabled and peripherals active, code executing
from flash
Wait mode high frequency current at 3.0 V — all
peripheral clocks disabled
Wait mode reduced frequency current at 3.0 V
— all peripheral clocks disabled
Stop mode current at 3.0 V
Very-low-power run mode current at 3.0 V — all
peripheral clocks disabled
Very-low-power run mode current at 3.0 V — all
peripheral clocks enabled
Very-low-power wait mode current at 3.0 V
Very-low-power stop mode current at 3.0 V
Low leakage stop mode current at 3.0 V
Very low-leakage stop mode 3 current at 3.0 V
Very low-leakage stop mode 2 current at 3.0 V
Very low-leakage stop mode 1 current at 3.0 V
Average current when CPU is not accessing
RTC registers at 3.0 V
Description
• @ 1.8V
• @ 3.0V
• @ 1.8V
• @ 3.0V
• 128KB RAM devices
• 64KB RAM devices
• 32KB RAM devices
Table 6. Power consumption operating behaviors (continued)
K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Preliminary
Min.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.25
TBD
1.05
Typ.
550
0.4
55
56
85
85
35
15
50
12
8
6
5
4
2
Max.
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
μA
μA
μA
μA
μA
μA
nA
Notes
General
3
4
2
5
6
7
8
9
15