WM8776SEFT/V Wolfson Microelectronics, WM8776SEFT/V Datasheet
WM8776SEFT/V
Specifications of WM8776SEFT/V
Related parts for WM8776SEFT/V
WM8776SEFT/V Summary of contents
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... Analogue Bypass Path Feature • Selectable AUX input to the volume controls • 2.7V to 5.5V Analogue, 2.7V to 3.6V Digital supply Operation APPLICATIONS • Surround Sound AV Processors and Hi-Fi systems • DVD-RW WM8776 Production Data, September 2008, Rev 4.1 Copyright ©2008 Wolfson Microelectronics plc ...
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WM8776 DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 PIN DESCRIPTION ................................................................................................4 ABSOLUTE MAXIMUM RATINGS.........................................................................5 ELECTRICAL CHARACTERISTICS ......................................................................6 TERMINOLOGY ............................................................................................................ 7 MASTER CLOCK TIMING......................................................................................9 DIGITAL AUDIO INTERFACE – MASTER MODE ....................................................... ...
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... Production Data PIN CONFIGURATION ORDERING INFORMATION TEMPERATURE DEVICE RANGE WM8776SEFT/V -25 to +85 WM8776SEFT/RV -25 to +85 Note: Reel quantity = 2,200 w PACKAGE SENSITIVITY LEVEL 48-pin TQFP o C (Pb-free) 48-pin TQFP o C (Pb-free, tape and reel) WM8776 MOISTURE PEAK SOLDERING TEMPERATURE MSL2 260°C (drybagged) MSL2 260° ...
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WM8776 PIN DESCRIPTION PIN NAME 1 AIN2L Analogue Input 2 AIN1R Analogue Input 3 AIN1L Analogue Input 4 DACBCLK Digital input/output 5 DACMCLK Digital input 6 DIN Digital Input 7 DACLRC Digital input/output 8 ZFLAGR Open Drain output 9 ZFLAGL ...
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Production Data ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical ...
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WM8776 ELECTRICAL CHARACTERISTICS Test Conditions AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, T PARAMETER Digital Logic Levels (TTL Levels) Input LOW level Input HIGH level Output LOW Output HIGH Analogue Reference Levels Reference voltage Potential ...
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Production Data Test Conditions AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, T ADC Channel Separation Programmable Gain Step Size Programmable Gain Range (Analogue) Programmable Gain Range (Digital) Analogue Mute Attenuation (Note 6) Power Supply Rejection ...
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WM8776 5. Channel Separation (dB) - Also known as Cross-Talk. This is a measure of the amount one channel is isolated from the other. Normally measured by sending a full scale signal down one channel and measuring the other. 6. ...
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Production Data MASTER CLOCK TIMING MCLK Figure 1 Master Clock Timing Requirements Test Conditions AVDD = 5V, DVDD = 3.3V, AGND = 0V, AGND, DGND = 0V, T otherwise stated. PARAMETER System Clock Timing Information ADC/DACMCLK System clock pulse width ...
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WM8776 DIGITAL AUDIO INTERFACE – MASTER MODE DACBCLK ADCBCLK ADCLRC WM8776 CODEC DACLRC DOUT DIN Figure 2 Audio Interface - Master Mode ADCBCLK/ DACBCLK (Output) ADCLRC/ DACLRC (Outputs) DOUT DIN Figure 3 Digital Audio Data Timing – Master Mode Test ...
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Production Data DIGITAL AUDIO INTERFACE – SLAVE MODE DACBCLK ADCBCLK ADCLRC WM8776 CODEC DACLRC DOUT DIN Figure 4 Audio Interface – Slave Mode t BCH ADCBCLK/ DACBCLK DACLRC/ ADCLRC DIN DOUT Figure 5 Digital Audio Data Timing – Slave Mode ...
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WM8776 3-WIRE MPU INTERFACE TIMING Figure 6 SPI Compatible (3-wire) Control Interface Input Timing (MODE=1) Test Conditions AVDD = 5V, DVDD = 3.3V, AGND, DGND = 0V, T PARAMETER CL rising edge to CE rising edge CL ...
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Production Data CONTROL INTERFACE TIMING – 2-WIRE MODE Figure 7 Control Interface Timing – 2-Wire Serial Control Mode (MODE=0) Test Conditions AVDD = 5V, DVDD = 3.3V, AGND, DGND = 0V, T ...
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WM8776 INTERNAL POWER ON RESET CIRCUIT Figure 8 Internal Power on Reset Circuit Schematic The WM8776 includes an internal Power on Reset Circuit which is used reset the digital logic into a default state after power up. Figure 8 shows ...
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Production Data Figure 10 Typical Power up Sequence where AVDD is Powered before DVDD Typical POR Operation (typical values, not tested) SYMBOL V pora V porr V pora_off V pord_off In a real application the designer is unlikely to have ...
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WM8776 DEVICE DESCRIPTION INTRODUCTION WM8776 is a complete 2-channel DAC, 2-channel ADC audio CODEC, with flexible input multiplexor including digital interpolation and decimation filters, multi-bit sigma delta stereo ADC, and switched capacitor multi-bit sigma delta DACs with analogue volume controls ...
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Production Data AUDIO DATA SAMPLING RATES In a typical digital audio system there is only one central clock source producing a reference clock to which all audio data processing is synchronised. This clock is often referred to as the audio ...
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WM8776 Table 8 shows the settings for ADCRATE and DACRATE for common sample rates and ADCMCLK/DACMCLK frequencies. SAMPLING RATE (DACLRC/ ADCLRC) 32kHz 44.1kHz 48kHz 96kHz 192kHz Table 8 Master Mode ADC/DACLRC Frequency Selection ADCBCLK and DACBCLK are also generated by ...
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Production Data DIGITAL AUDIO INTERFACE MASTER AND SLAVE MODES The audio interface operates in either Slave or Master mode, selectable using the MS control bit. In both Master and Slave modes DIN is always an input to the WM8776 and ...
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WM8776 AUDIO INTERFACE FORMATS Audio data is applied to the internal DAC filters or output from the ADC filters, via the Digital Audio Interface. 5 popular interface formats are supported: • Left Justified mode • Right Justified mode 2 • ...
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Production Data RIGHT JUSTIFIED MODE In right justified mode, the LSB of DIN is sampled by the WM8776 on the rising edge of DACBCLK preceding a DACLRC transition. The LSB of the ADC data is output on DOUT and changes ...
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WM8776 Figure 16 DSP/PCM Mode Audio Interface (mode A, LRP=0, Master) Figure 17 DSP/PCM Mode Audio Interface (mode B, LRP=1, Master) Figure 18 DSP/PCM Mode Audio Interface (mode A, LRP=0, Slave) w Production Data PD, Rev 4.1, September 2008 22 ...
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Production Data Figure 19 DSP/PCM Mode Audio Interface (mode B, LRP=0, Slave) CONTROL INTERFACE OPERATION The WM8776 is controlled by writing to registers through a serial control interface. A control word consists of 16 bits. The first 7 bits (B15 ...
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WM8776 2-WIRE SERIAL CONTROL MODE The WM8776 supports software control via a 2-wire serial bus. Many devices can be controlled by the same bus, and each device has a unique 7-bit address (this is not the same as the 7-bit ...
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Production Data CONTROL INTERFACE REGISTERS DIGITAL AUDIO INTERFACE CONTROL REGISTER Interface format is selected via the FMT[1:0] register bits: REGISTER ADDRESS DAC Interface Control ADC Interface Control In left justified, right justified or I ADCLRC/DACLRC. If this bit is set ...
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WM8776 When operating the ADC digital interface in slave mode, to optimise the performance of the ADC it is recommended that the ADCMCLK and ADCBCLK input signals do not have coinciding rising edges. The ADCMCLK bit provides the option to ...
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Production Data ADC OVERSAMPLING RATE SELECT For ADC operation at 96kHz it is recommended that the user set the ADCOSR bit. This changes the ADC signal processing oversample rate to 64fs. REGISTER ADDRESS ADC Oversampling Rate MUTE MODES Setting MUTE ...
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WM8776 ADC MUTE Each ADC channel also has an individual mute control bit, which mutes the input to the ADC PGA. By setting the LRBOTH bit (reg22, bit 8) both channels can be muted simultaneously. REGISTER ADDRESS ADC Mute Left ...
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Production Data REGISTER ADDRESS Powerdown Control DIGITAL ATTENUATOR CONTROL MODE Setting the ATC register bit causes the left channel attenuation settings to be applied to both left and right channel DACs from the next audio input sample. No update to ...
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WM8776 ANALOGUE OUTPUT VOLUME CONTROLS There are analogue volume controls for the headphone outputs which may be adjusted independently using separate volume control registers. REGISTER BIT LABEL ADDRESS R0 (00h) 6:0 HPLA[6:0] 0000000 Analogue 7 HPLZCEN Attenuation Headphone Output Left ...
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Production Data HPLA/ HPRA[6:0] Table 13 Headphone Volume Control Attenuation Levels In addition a zero cross detect circuit is provided for the output PGA volume under the control of bit 7 (ZCEN) in the each attenuation register. When ZCEN is ...
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WM8776 Table 14 Digital Volume Control Attenuation Levels The digital volume control also incorporates a zero cross detect circuit which detects a transition through the zero point before updating the digital volume control with the new volume. This is enabled ...
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Production Data In addition a zero cross detect circuit is provided for the output PGA volume under the control of bit 7 (ZCEN) in the each attenuation register. When ZCEN is set the attenuation values are only updated when the ...
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WM8776 LIMITER / AUTOMATIC LEVEL CONTROL (ALC) The WM8776 has an automatic pga gain control circuit, which can function as a peak limiter automatic level control (ALC). In peak limiter mode, a digital peak detector detects when ...
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Production Data The gain control circuit is enabled by setting the LCEN control bit. The user can select between Limiter mode and three different ALC modes using the LCSEL control bits. REGISTER ADDRESS R17 (11h) 0010001 ALC Control 2 R16 ...
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WM8776 REGISTER ADDRESS R18 (12h) 0010010 ALC Control 3 TRANSIENT WINDOW (LIMITER ONLY) To prevent the limiter responding to to short duration high ampitude signals (such as hand-claps in a live performance), the limiter has a programmable transient window preventing ...
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Production Data MAXIMUM GAIN (ALC ONLY) AND MAXIMUM ATTENUATION To prevent low level signals being amplified too much by the ALC, the MAXGAIN register sets the upper limit for the gain. This prevents low level noise being over-amplified. The MAXGAIN ...
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WM8776 NOISE GATE (ALC ONLY) When the signal is very quiet and consists mainly of noise, the ALC function may cause “noise pumping”, i.e. loud hissing noise during silence periods. The WM8776 has a noise gate function that prevents noise ...
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Production Data ADC INPUT MIXER AND POWERDOWN CONTROL REGISTER ADDRESS R21 (15h) ADC Input Mux R13 (0Dh) Powerdown Control Register bits AMX[4:0] control the left and right channel inputs into the stereo ADC. The default is AIN1. One bit of ...
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WM8776 OUTPUT SELECT AND ENABLE CONTROL Register bits MX controls the output selection. The output select block consists of a summing stage and an input select switch for each input allowing each signal to be output individually or summed with ...
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Production Data REGISTER MAP The complete register map is shown below. The detailed description can be found in the relevant text of the device description. The WM8776 can be configured using the Control Interface. All unused bits should be set ...
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WM8776 REGISTER BIT LABEL ADDRESS R0 (00h) 6:0 HPLA[6:0] 0000000 Headphone Analogue 7 HPLZCEN Attenuation Headphone Left 8 UPDATE R1 (01h) 6:0 HPRA[6:0] 0000001 Headphone Analogue 7 HPRZCEN Attenuation Headphone Right 8 UPDATE R2 (02h) 6:0 HPMASTA[6:0] 0000010 Headphone Master ...
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Production Data REGISTER BIT LABEL ADDRESS R6 (06h) 1:0 PHASE 0000110 Phase Swaps R7 (07h) 0 DZCEN 0000111 DAC Control ATC 1 2 IZD 3 TOD 7:4 PL[3:0] R8 (08h) 0 DMUTE 0001000 DAC Mute R9 (09h) 0 DEEMPH 0001001 ...
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WM8776 REGISTER BIT LABEL ADDRESS R10 (0Ah) 1:0 DACFMT[1:0] 0001010 DAC Interface Control 2 DACLRP 3 DACBCP 5:4 DACWL[1:0] R11 (0Bh) 1:0 ADCFMT[1:0] 0001011 ADC Interface Control 2 ADCLRP 3 ADCBCP 5:4 ADCWL[1:0] 6 ADCMCLK 8 ADCHPD w DEFAULT 10 ...
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Production Data REGISTER BIT LABEL ADDRESS R12 (0Ch) 2:0 ADCRATE[2:0] 0001100 Master Mode Control 3 ADCOSR 6:4 DACRATE[2:0] 7 DACMS 8 ADCMS R13 (0Dh) 0 PDWN 0001101 PWR Down Control 1 ADCPD 2 DACPD 3 HPPD 6 AINPD R14 (0Eh) ...
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WM8776 REGISTER BIT LABEL ADDRESS R15 (0Fh) 7:0 RAG[7:0] 0001111 Attenuation ADCR 8 ZCRA R16 (10h) 3:0 LCT[3:0] 0010000 ALC Control 1 6:4 MAXGAIN[2:0] 8:7 LCSEL[1:0] R17 (11h) 3:0 HLD[3:0] 0010001 ALC Control 2 7 ALCZC 8 LCEN w DEFAULT ...
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Production Data REGISTER BIT LABEL ADDRESS R18 (12h) 3:0 ATK[3:0] 0011000 ALC Control 3 7:4 DCY[3:0] R19 (13h) 0 NGAT 0010011 Noise Gate Control 4:2 NGTH [2:0] R20 (14h) 3:0 MAXATTEN [3:0] 0010100 Limiter Control 6:4 TRANWIN [2:0] R21 (15h) ...
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WM8776 REGISTER BIT LABEL ADDRESS 8 LRBOTH R22 (16h) 2:0 MX[2:0] 0010110 Output Mux R23 (17h) [8:0] RESET 0010111 Software Reset w DEFAULT 0 Right channel input PGA controlled by left channel register 0 : Right channel uses RAG and ...
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Production Data DIGITAL FILTER CHARACTERISTICS PARAMETER ADC Filter Passband Passband ripple Stopband Stopband Attenuation Group Delay DAC Filter Passband Passband ripple Stopband Stopband Attenuation Group Delay Table 17 Digital Filter Characteristics DAC FILTER RESPONSES 0 -20 -40 -60 -80 -100 ...
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WM8776 0.2 0.15 0.1 0.05 0 -0.05 -0.1 -0.15 -0.2 0 0.1 0.2 Frequency (Fs) Figure 29 DAC Digital Filter Ripple – 44.1, 48 and 96kHz 0.2 0 -0.2 -0.4 -0.6 -0 0.05 0.1 0.15 0.2 0.25 Frequency ...
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Production Data ADC HIGH PASS FILTER The WM8776 has a selectable digital highpass filter to remove DC offsets. The filter response is characterised by the following polynomial. H( 0.9995z 0 -5 -10 -15 0 0.0005 0.001 Frequency ...
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WM8776 DIGITAL DE-EMPHASIS CHARACTERISTICS - Frequency (kHz) Figure 35 De-Emphasis Frequency Response (32kHz - Frequency (kHz) Figure 37 De-Emphasis Frequency Response (44.1KHz) ...
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Production Data APPLICATIONS INFORMATION EXTERNAL CIRCUIT CONFIGURATION In order to allow the use of 2V rms and larger inputs to the ADC and AUX inputs, a structure is used that uses external resistors to drop these larger voltages. This also ...
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WM8776 RECOMMENDED EXTERNAL COMPONENTS Figure 43 External Component Diagram w Production Data PD, Rev 4.1, September 2008 54 ...
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Production Data It is recommended that a low pass filter be applied to the output from the DAC for hi-fi applications. Typically a second order filter is suitable and provides sufficient attenuation of high frequency components (the unique low order, ...
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WM8776 PACKAGE DIMENSIONS FT: 48 PIN TQFP ( 1.0 mm Dimensions Symbols (mm) MIN NOM A ----- ----- A 0.05 ----- 1 A 0.95 1. ...
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... Production Data IMPORTANT NOTICE Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice ...