WM8351GEB/V Wolfson Microelectronics, WM8351GEB/V Datasheet - Page 102

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WM8351GEB/V

Manufacturer Part Number
WM8351GEB/V
Description
Audio CODECs Audio CODEC plus pwr management
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8351GEB/V

Number Of Adc Inputs
2
Number Of Dac Outputs
2
Conversion Rate
48 KSPS
Interface Type
Serial (2-Wire, 3-Wire, 4-Wire)
Resolution
12 bit
Operating Supply Voltage
3.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
BGA
Minimum Operating Temperature
- 25 C
Number Of Channels
2 ADC/2 DAC
Supply Current
260 uA
Thd Plus Noise
- 83 dB
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
8
No. Of Output Channels
6
Adc / Dac Resolution
24bit
Adcs / Dacs Signal To Noise Ratio
95dB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
WM8351
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13.12.5 UNUSED ANALOGUE INPUTS/OUTPUTS
Whenever an analogue input/output is disabled, it remains connected to AVDD/2 through a resistor.
This helps to prevent pop noise when the output is re-enabled. The resistance between the voltage
buffer and the output pins can be controlled using the VROI control bits. The default impedance is
low, so that any capacitors on the outputs can charge up quickly at start-up. If high impedance is
desired for disabled outputs, VROI can then be set to 1, increasing the resistance to about 30kΩ.
There are individual VROI bits for each output or output pair. This allows matching of the rise times
of the outputs if they are driving different capacitors. Using the small resistance with a capacitor for
headphone outputs (typically 220uF) and the larger resistance with a line load capacitance (10uF for
example); will allow both sets of outputs to power up in around the same time, around 200ms.
Table 51 Disabled Outputs to VREF Resistance
A dedicated buffer is available for tying off unused analogue I/O pins as shown below. This buffer
can be enabled using the VBUF_ENA register bit.
R8 (08h)
Power Mgmt
1
R76 (4Ch)
Output
Control
REGISTER
ADDRESS
BIT
13
10
11
8
9
VBUF_ENA
OUT1_VROI
OUT2_VROI
OUT3_VROI
OUT4_VROI
LABEL
DEFAULT
0
0
0
0
0
Forces ON the tie-off amplifiers
0 = Disabled
1 = Enabled
VREF (AVDD/2) to OUT1L/OUT1R
resistance
0 = approx 500Ω
1 = approx 30 kΩ
VREF (AVDD/2) to OUT2L/OUT2R
resistance
0 = approx 500Ω
1 = approx 30 kΩ
VREF (AVDD/2) to OUT3 resistance
0 = approx 500Ω
1 = approx 30 kΩ
VREF (AVDD/2) to OUT4 resistance
0 = approx 500Ω
1 = approx 30 kΩ
DESCRIPTION
PD, March 2010, Rev 4.2
Production Data
102

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