WM8351GEB/V Wolfson Microelectronics, WM8351GEB/V Datasheet - Page 154

• Manufacturer Part Number: WM8351GEB/V
• Description: Audio CODECs Audio CODEC plus pwr management
• Manufacturer: Wolfson Microelectronics

Specifications of WM8351GEB/V

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, 4-Wire)
• Resolution: 12 bit
• Operating Supply Voltage: 3.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• Minimum Operating Temperature: - 25 C
• Number Of Channels: 2 ADC/2 DAC
• Supply Current: 260 uA
• Thd Plus Noise: - 83 dB
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 8
• No. Of Output Channels: 6
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 95dB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8351
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Table 100 Selecting USB Power Modes
The USB connection has its own first-level interrupt, USB_INT (see Section 24). This contains a
single second-level interrupt, USB_LIMIT_EINT, which indicates an over-current condition.
USB_LIMIT_EINT can be masked by setting the IM_USB_LIMIT_EINT bit.
USB Current monitoring is effective in USB Master and USB Slave Modes. The current limit
threshold is determined by USB_MSTR_500MA (in USB Master Mode) or USB_SLV_500MA (in USB
Slave Mode).
R26 (1Ah)
Interrupt
Status 2
R34 (22h)
Interrupt
Status 2 Mask
Table 101 USB Interrupt
R4 (04h)
System
Control 2
ADDRESS
ADDRESS
BIT
14
13
11
9
BIT
10
10
USB_SUSPEND
USB_MSTR
USB_MSTR_500MA
USB_SLV_500MA
USB_LIMIT_EINT
IM_USB_LIMIT_EINT
LABEL
LABEL
Dependant
DEFAULT
CONFIG
settings
on
0
0
0
Opens the USB switch
0 = USB enabled
1 = USB suspended
The register bit defaults to 0, when a
reset happens or LINE < UVLO or the
system fail on boot due to the upper
limit of the Hysteresis Comp not been
met.
Set the chip to be a USB master
0 = Slave
1 = Master
The register bit defaults to 0, when a
reset happens or the USB state
machine moves from MASTER mode to
SLAVE mode.
Set 500mA or 100mA mode when the
USB switch is in master mode
0 = 100mA
1 = 500mA
Set 500mA or 100mA mode when the
USB switch is in slave mode
0 = 100mA
1 = 500mA
The register bit defaults to 0, when a
reset happens or LINE<UVLO or the
system fail on boot due to the upper
limit of the Hysteresis Comp not been
met.
USB Limit Switch interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
When IM_USB_LIMIT_EINT is set to 1,
then USB_LIMIT_EINT in R26 does not
trigger an USB_INT interrupt when set.
The default value is 0 (unmasked).
DESCRIPTION
PD, March 2010, Rev 4.2
DESCRIPTION
Production Data
154