IES5501D Hendon Semiconductors, IES5501D Datasheet - Page 5

• Manufacturer Part Number: IES5501D
• Description: Buffers & Line Drivers 2.7-5.5V 4.3mA 90ns 400-1000kHz
• Manufacturer: Hendon Semiconductors

Specifications of IES5501D

• Logic Family: IE5501
• Number Of Channels Per Chip: Dual
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Current: 4.3 mA
• Logic Type: Bidirectional Bus Buffer
• Package / Case: MSOP-8L
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9
9.1
Figure 9 shows the IES5501 level shifting signals from
1.8V to 3.3V at 1MHz clock speed. The IES5501 has
excellent application to extending loads and providing
interfaces to connectors on high speed microprocessor
cards, well in excess of the “fast mode” 400kHz I
specification
side of the buffer with the slowest RC time constant.
Figure 10 shows a typical application for the IES5501. The
IC can level shift between different bus voltages, without
the need for external components. Higher bus voltages
and currents outside the range of the standard I
specification can be catered for, providing a longer range
capability and higher noise immunity.
The enable pin can be used to interface buses of different
operating frequencies. When certain bus sections are
enabled the system frequency may be limited by a bus
section having a slave device specified only to 100 kHz.
When that bus section is disabled, the slow slave is
isolated and the remaining bus can be run at 400 kHz. The
timing performance and current sinking capability will allow
the IES5501 to run well in excess of the 400 kHz maximum
limit of the I
Figure 11 shows the IES5501 used in a radial (star)
configuration on an AdvancedTCA
Controller board (ShMC). The IES5501 is highly suited to
this and other backplane applications, providing excellent
noise margins and I2C compliant switching levels.
(1) “UM10204: I2C-bus Specification and User Manual”, Rev 03,
(2) Trademark of the PCI Industrial Computer Manufacturers
2008 Jun 13, Revision 1.4
19 June 2007, NXP B.V.
Group (PICMG)
APPLICATION INFORMATION
Design Considerations
Fig.9 1.8V to 3.3V Level Shifting at 1MHz
2
(1)
C fast mode.
. Rise times are determined simply by the
(2)
Shelf Management
2
2
C bus
C bus
5
Fast Dual Bi-Directional Bus Buffer
Peripheral cards (or Field Replaceable Units, FRU) and
backplanes operating at a range of voltages can be
interfaced together using a minimum of components.The
IES5501 can be teamed with the IES5502 to achieve
substantial noise margin gains across a system.
Multiplexers such as the PCA9544A are simple analog
switches which provide no capacitive load isolation
between connected branches. Figure 13 shows the
IES5501 enhancing an I
isolating the load capacitance of each branch. Figures 14
and 15 show alternate forms of bus multiplexing.
Similarly, the P82B715 I
commonly used for line driver applications, provides a “10x
impedance transformation”
side of the buffer. Figure 12 shows the IES5501 used to
isolate the bus loading due to the P82B715. This greatly
simplifies calculation of the pull-ups, increases the total
system loading capability in extender applications, will
meet the Fast Mode release requirement (when IES5501
and P82B715 V
ensures the 300 ns risetime requirement can easily be met
even if the cable bus rise is relatively slow.
Buffers are intended to extend total system capacitance
above 400pF so anticipate high capacitance on each side.
When loading on one side is small, adding 47pF is
suggested to avoid any waveform ripple, should it occur.
9.2
The offset voltage between the side acting as the output
(S
IES5501 can be calculated using the relationship:
This calculation is valid for V
point the saturation voltage of the open collector output
drive transistor will begin to affect the characteristic. Input
and output voltages are shown in millivolts, V
supply voltage to the bus) is in volts, and R is in ohms.
An example calculation for VBUS = 3.3V, V
the resistance R pulling up S
S
This can be compared with the offset characteristic shown
in Figure 4.
(3) P82B715 I2C bus extender datasheet, 2 December 2003,
A2
xx(out)
V
Philips Electronics N.V.
is typically:
Sxx out
V
Input to Output Offset Voltage Calculation
) and the side acting as the input (S
SA2
(
)
=
=
200mV
CC
V
Sxx in
’s share a common supply), and
( )
+
=
2
2
+
C bus extender, which is
15mV
C multiplexer application, by
240mV
15mV
(3)
Sxx(in)
A2
but does not isolate either
is 2k, then the voltage on
+
+
(
≥
Product Specification
3.3 2000
(
IES5501
V
200mV, as below this
BUS
⁄
⁄
R
xx(in)
SA1
) 15 Ω
) 15
BUS
•
•
) of the
= 200mV,
(the
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