A2F200M3F-1FGG256 Actel, A2F200M3F-1FGG256 Datasheet - Page 47

• Manufacturer Part Number: A2F200M3F-1FGG256
• Description: FPGA - Field Programmable Gate Array 200K System Gates SmartFusion
• Manufacturer: Actel

Specifications of A2F200M3F-1FGG256

• Processor Series: A2F200
• Core: ARM Cortex M3
• Number Of Logic Blocks: 8
• Maximum Operating Frequency: 120 MHz
• Number Of Programmable I/os: 117
• Data Ram Size: 4608 bit
• Delay Time: 200 ns
• Supply Voltage (max): 3.6 V
• Supply Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 200000
• Package / Case: FPBGA-256
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-49 • 1.8 V LVCMOS High Slew
Table 2-50 • 1.8 V LVCMOS Low Slew
Drive
Strength
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
Drive
Strength
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
Note:
For specific junction temperature and voltage supply levels, refer to
Speed
Grade
Worst Commercial-Case Conditions: T
Worst-Case VCCxxxxIOBx = 1.7 V
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Worst Commercial-Case Conditions: T
Worst-Case VCCxxxxIOBx = 1.7 V
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Std.
Std.
Std.
Std.
Std.
Std.
Timing Characteristics
Speed
Grade
–1
–1
–1
–1
–1
–1
Std.
Std.
Std.
Std.
Std.
Std.
–1
–1
–1
–1
–1
–1
t
DOUT
0.60
0.50
0.60
0.50
0.60
0.50
0.60
0.50
0.60
0.50
0.60
0.50
t
0.60
0.50
0.50
0.60
0.50
0.60
0.50
0.60
0.50
0.60
0.50
DOUT
0.60
11.06
9.22
6.46
5.38
4.16
3.47
3.69
3.07
3.38
2.81
3.38
2.81
t
DP
14.24
11.87
9.74
7.67
6.39
7.15
5.96
6.76
5.64
6.76
5.64
8.11
t
DP
0.04
0.03
0.04
0.03
0.04
0.03
0.04
0.03
0.04
0.03
0.04
0.03
t
DIN
0.04
0.03
0.04
0.03
0.04
0.03
0.04
0.03
0.04
0.03
0.04
0.03
t
DIN
1.14
0.95
1.14
0.95
1.14
0.95
1.14
0.95
1.14
0.95
1.14
0.95
t
1.14
0.95
1.14
0.95
1.14
0.95
1.14
0.95
1.14
0.95
1.14
0.95
PY
t
PY
t
t
J
0.39
0.32
0.39
0.32
0.39
0.32
0.39
0.32
0.39
0.32
0.39
0.32
J
EOUT
0.39
0.32
0.39
0.32
0.39
0.32
0.39
0.32
0.39
0.32
0.39
0.32
EOUT
= 85°C, Worst-Case VCC = 1.425 V,
= 85°C, Worst-Case VCC = 1.425 V,
R e v i s i o n 6
13.47
11.23
8.61
7.17
5.53
4.61
3.99
3.32
3.76
3.13
3.44
2.87
3.44
2.87
9.92
8.26
7.81
6.51
7.29
6.07
6.89
5.74
6.89
5.74
t
t
ZL
ZL
Table 2-7 on page 2-9
11.06
14.24
11.87
9.22
6.46
5.38
4.16
3.47
3.67
3.06
2.86
2.38
2.86
2.38
9.62
8.02
7.24
6.03
6.75
5.62
6.75
5.62
6.75
5.62
t
t
ZH
ZH
SmartFusion Intelligent Mixed Signal FPGAs
Table 2-7 on page 2-9
2.62
2.18
3.05
2.54
3.34
2.79
3.41
2.84
3.50
2.92
3.50
2.92
2.61
2.18
3.04
2.54
3.34
2.78
3.40
2.84
3.50
2.92
3.50
2.92
t
t
LZ
LZ
1.54
1.28
2.57
2.14
3.08
2.56
3.21
2.68
3.70
3.08
3.70
3.08
1.59
1.33
2.66
2.22
3.18
2.65
3.31
2.76
3.82
3.18
3.82
3.18
t
t
HZ
HZ
for derating values.
15.53
12.94
11.98
9.98
9.87
8.23
9.34
7.79
8.95
7.46
8.95
7.46
t
10.67
ZLS
8.89
7.59
6.33
6.05
5.04
5.81
4.85
5.50
4.58
5.50
4.58
t
ZLS
for derating values.
16.30
13.59
11.68
t
9.74
9.30
7.75
8.80
7.34
8.81
7.34
8.81
7.34
13.12
10.93
ZHS
t
8.51
7.10
6.22
5.18
5.73
4.78
4.91
4.10
4.91
4.10
ZHS
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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