LFE2M20SE-5FN484C Lattice, LFE2M20SE-5FN484C Datasheet - Page 317

• Manufacturer Part Number: LFE2M20SE-5FN484C
• Description: FPGA - Field Programmable Gate Array 19K LUTs 304 I/O S-Ser SERDES DSP -5
• Manufacturer: Lattice

Specifications of LFE2M20SE-5FN484C

• Number Of Macrocells: 19000
• Maximum Operating Frequency: 311 MHz
• Number Of Programmable I/os: 304
• Data Ram Size: 1246208
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LFE2M100E/SE Logic Signal Connections: 900 fpBGA (Cont.)
Lattice Semiconductor
Ball Number
GNDIO
GNDIO
GNDIO
GNDIO
VCCIO
VCCIO
VCCIO
AH30
AG27
AD25
AG28
AG30
AG29
AC24
AD26
AD29
AC25
AD30
AC26
AC27
AC28
AC29
AC30
AK29
AF27
AF28
AE26
AB23
AF29
AF30
AE29
AE30
AA22
AA23
AB22
AB30
AA30
AB29
AB28
AB26
AJ30
Y22
Y23
DOUT/CSON/CSSPI1N***
LRC_SQ_VCCRX0
Ball/Pad Function
LRC_SQ_VCCIB0
LRC_SQ_HDINP0
D0/SPIFASTN***
RLM0_PLLCAP
DI/CSSPI0N***
BUSY/SISPI***
PROGRAMN
D7/SPID0***
WRITEN***
GNDIO8
CS1N***
VCCIO8
GNDIO8
VCCIO8
PR102B
GNDIO3
PR102A
PR101B
PR101A
PR100B
VCCIO3
PR100A
GNDIO3
CSN***
PR99B
PR99A
PR98B
PR98A
PR97B
DONE
CFG2
CFG1
CFG0
CCLK
INITN
D1***
D2***
D3***
D4***
D5***
D6***
LFE2M100E/SE
Bank
4-214
13
13
13
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
3
3
3
3
3
3
3
3
3
3
3
3
3
-
-
-
-
RLM0_GDLLC_IN_A**/RDQ99
RLM0_GPLLC_IN_A**/RDQ99
RLM0_GPLLT_FB_A/RDQS99
RLM0_GDLLT_IN_A**/RDQ99
RLM0_GPLLT_IN_A**/RDQ99
RLM0_GDLLC_FB_A/RDQ99
RLM0_GPLLC_FB_A/RDQ99
RLM0_GDLLT_FB_A/RDQ99
LatticeECP2/M Family Data Sheet
Dual Function
RDQ99
RDQ99
RDQ99
Pinout Information
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
C
C
C
T
T
T
T