A3PE1500-PQG208 Actel, A3PE1500-PQG208 Datasheet - Page 29

• Manufacturer Part Number: A3PE1500-PQG208
• Description: FPGA - Field Programmable Gate Array 1500K System Gates
• Manufacturer: Actel

Specifications of A3PE1500-PQG208

• Processor Series: A3PE1500
• Core: IP Core
• Maximum Operating Frequency: 231 MHz
• Number Of Programmable I/os: 147
• Data Ram Size: 276480
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 1.5 M
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-13 • Summary of Maximum and Minimum DC Input and Output Levels
I/O Standard
3.3 V LVTTL /
3.3 V
LVCMOS
3.3 V
LVCMOS
Wide Range
2.5 V
LVCMOS
1.8 V
LVCMOS
1.5 V
LVCMOS
3.3 V PCI
3.3 V PCI-X
3.3 V GTL
2.5 V GTL
3.3 V GTL+
2.5 V GTL+
HSTL (I)
HSTL (II)
SSTL2 (I)
SSTL2 (II)
SSTL3 (I)
SSTL3 (II)
Notes:
1. Currents are measured at 85°C junction temperature.
2. Output drive strength is below JEDEC specification.
3. Output Slew Rates can be extracted from
4. Please note that 3.3 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will NOT
http://www.actel.com/download/ibis/default.aspx.
operate at the equivalent software default drive strength. These values are for normal ranges ONLY.
Applicable to Commercial and Industrial Conditions
Overview of I/O Performance
Summary of I/O DC Input and Output Levels – Default I/O Software
Settings
Strength
25 mA
25 mA
15 mA
100 µA
12 mA
12 mA
12 mA
12 mA
35 mA
33 mA
15 mA
18 mA
14 mA
21 mA
Drive
8 mA
2
2
2
Equivalent
Software
Strength
Option
Default
25 mA
25 mA
15 mA
12 mA
12 mA
12 mA
12 mA
12 mA
35 mA
33 mA
15 mA
18 mA
14 mA
21 mA
Drive
8 mA
2
2
2
4
Slew
Rate
High –0.3
High –0.3
High –0.3
High –0.3 0.35 * VCCI 0.65 * VCCI 3.6
High –0.3 0.30 * VCCI 0.7 * VCCI
High –0.3 VREF – 0.05 VREF + 0.05 3.6
High –0.3 VREF – 0.05 VREF + 0.05 3.6
High –0.3 VREF – 0.1 VREF + 0.1 3.6
High –0.3 VREF – 0.1 VREF + 0.1 3.6
High –0.3 VREF – 0.1 VREF + 0.1 3.6
High –0.3 VREF – 0.1 VREF + 0.1 3.6
High –0.3 VREF – 0.2 VREF + 0.2 3.6
High –0.3 VREF – 0.2 VREF + 0.2 3.6
High –0.3 VREF – 0.2 VREF + 0.2 3.6
High –0.3 VREF – 0.2 VREF + 0.2 3.6
IBIS
Min.
V
Models, located at
VIL
Per PCI-X Specification
Max.
Per PCI Specification
0.8
0.8
0.7
V
R e v i s i o n 9
Min.
1.7
V
2
2
VIH
Max.
3.6
3.6
3.6
3.6 0.25 * VCCI 0.75 * VCCI 12 12
V
Max.
VOL
0.45
0.54
0.35
0.4
0.2
0.7
0.4
0.4
0.6
0.6
0.4
0.4
0.7
0.5
V
ProASIC3E Flash Family FPGAs
VCCI – 0.45 12 12
VCCI – 0.62 15 15
VCCI – 0.43 18 18
VCCI – 0.2 0.1 0.1
VCCI – 0.4 8
VCCI – 0.4 15 15
VCCI – 1.1 14 14
VCCI – 0.9 21 21
VOH
Min.
2.4
1.7
V
–
–
–
–
mA mA
I
12 12
12 12
25 25
25 25
51 51
40 40
OL
I
2- 17
OH
8