A3PE1500-PQG208 Actel, A3PE1500-PQG208 Datasheet - Page 33

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A3PE1500-PQG208

Manufacturer Part Number
A3PE1500-PQG208
Description
FPGA - Field Programmable Gate Array 1500K System Gates
Manufacturer
Actel
Datasheet

Specifications of A3PE1500-PQG208

Processor Series
A3PE1500
Core
IP Core
Maximum Operating Frequency
231 MHz
Number Of Programmable I/os
147
Data Ram Size
276480
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
1.5 M
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3PE1500-PQG208
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A3PE1500-PQG208
Manufacturer:
MICROSEMI/美高森美
Quantity:
20 000
Part Number:
A3PE1500-PQG208I
Manufacturer:
ACTEL
Quantity:
5 000
Part Number:
A3PE1500-PQG208I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Detailed I/O DC Characteristics
Table 2-18 • Input Capacitance
Table 2-19 • I/O Output Buffer Maximum Resistances
Symbol
C
C
Standard
3.3 V LVTTL / 3.3 V LVCMOS
3.3 V LVCMOS Wide Range
2.5 V LVCMOS
1.8 V LVCMOS
1.5 V LVCMOS
3.3 V PCI/PCI-X
3.3 V GTL
2.5 V GTL
3.3 V GTL+
2.5 V GTL+
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance
2. R
3. R
IN
INCLK
values depend on V
considerations and detailed output buffer resistances, use the corresponding IBIS models located on the
Actel website at http://www.actel.com/techdocs/models/ibis.html.
(PULL-DOWN-MAX)
(PULL-UP-MAX)
Input capacitance
Input capacitance on the clock pin
= (VCCImax – VOHspec) / I
= (VOLspec) / I
CCI
Definition
, drive strength selection, temperature, and process. For board design
Per PCI/PCI-X specification
OLspec
Drive Strength
R e v i s i o n 9
O H spec
100 µA
12 mA
16 mA
24 mA
12 mA
16 mA
24 mA
12 mA
16 mA
12 mA
25 mA
25 mA
35 mA
33 mA
4 mA
8 mA
4 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
1
VIN = 0, f = 1.0 MHz
VIN = 0, f = 1.0 MHz
Conditions
R
PULL-DOWN
TBD
100
100
200
100
200
100
ProASIC3E Flash Family FPGAs
50
25
17
11
50
25
20
11
50
50
20
20
67
33
33
25
11
14
12
15
(Ω)
Min.
2
R
Max.
PULL-UP
8
8
TBD
300
150
200
100
225
112
224
112
75
50
33
50
40
22
56
56
22
22
75
37
37
75
Units
pF
pF
(Ω)
2- 21
3

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