MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 36

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

General System Control Information
5
5.1
This section discusses power pins, reset sources, interrupt sources, clock sources, the system integration module (SIM), ADC
synchronization, and JTAG/EOnCE interfaces.
5.2
V
peripherals, I/O buffer circuitry, and internal voltage regulators. The device has multiple internal voltages to provide regulated
lower-voltage sources for the peripherals, core, memory, and on-chip relaxation oscillators.
Typically, at least two separate capacitors are across the power pins to bypass the glitches and provide bulk charge storage. In
this case, a bulk electrolytic or tantalum capacitor, such as a 10 µF tantalum capacitor, should provide bulk charge storage for
the overall system, and a 0.1 µF ceramic bypass capacitor should be located as near to the device power pins as is practical to
suppress high-frequency noise. Each pin must have a bypass capacitor for optimal noise suppression.
V
CMP modules. A 0.1 µF ceramic bypass capacitor should be located as near to the device V
to suppress high-frequency noise. V
respectively, for the ADC module.
5.3
Resetting the device provides a way to start processing from a known set of initial conditions. During reset, most control and
status registers are forced to initial values, and the program counter is loaded from the reset vector. On-chip peripheral modules
are disabled and I/O pins are initially configured at the reset status shown in
The MC56F825x/MC56F824x has the following sources for reset:
36
DD
DDA
•
•
•
•
•
•
, V
and V
SS
X:0xFF FF89 –X:0xFF FF00
X:0xFF FF91–X:0xFF FF90
Power-on reset (POR)
Partial power-down reset (PPD)
Low-voltage detect (LVD)
External pin reset (EXTR)
Computer operating properly loss of reference reset (COP_LOR)
Computer operating properly time-out reset (COP_CPU)
and V
General System Control Information
Overview
Power Pins
Reset
SSA
X:0xFF FF8E
X:0xFF FF8D
X:0xFF FF8C
X:0xFF FF8B
X:0xFF FF8A
X:0xFF FF8F
DDA
are the analog power supply pins for the device. This voltage source supplies power to the ADC, PGA, and
Address
, V
SSA
are the primary power supply pins for the device. The voltage source supplies power to all on-chip
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
DDA
and V
Register Abbreviation
Table 13. EOnCE Memory Map
SSA
OBMSK (32 bits)
are also the voltage reference high and voltage reference low inputs,
OBCNTR
OESCR
Breakpoint Unit Mask Register 2
Reserved
EOnCE Breakpoint Unit Counter
Reserved
Reserved
Reserved
External Signal Control Register
Reserved
Table 5 on page
Register Name
DDA
18.
and V
Freescale Semiconductor
SSA
pins as is practical