ICE2QR0665 Infineon Technologies, ICE2QR0665 Datasheet - Page 8

• Manufacturer Part Number: ICE2QR0665
• Description: IC CTRLR SMPS QUASI-RESON 8DIP
• Manufacturer: Infineon Technologies
• Series: CoolSET®-Q1r

Specifications of ICE2QR0665

• Output Isolation: Isolated
• Frequency Range: 39kHz ~ 65kHz
• Voltage - Input: 11.2 V ~ 27 V
• Voltage - Output: 650V
• Power (watts): 88W
• Operating Temperature: -25°C ~ 125°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.3.1.1
The up/down counter stores the number of the zero
crossing to be ignored before the main power switch is
switched on after demagnetisation of the transformer.
This value is fixed according to the feedback voltage,
V
power. Indeed, in a typical peak current mode control,
a high output power results in a high feedback voltage,
and a low output power leads to a low regulation
voltage. Hence, according to V
down counter is changed to vary the power MOSFET
off-time according to the output power. In the following,
the variation of the up/down counter value according to
the feedback voltage is explained.
The feedback voltage V
three threshold voltages V
clock period of 48ms. The up/down counter counts then
upward, keep unchanged or count downward, as
shown in
Table 1
In the ICE2QR0665, the number of zero crossing is
limited to 7. Therefore, the counter varies between 1
and 7, and any attempt beyond this range is ignored.
When V
is initialised to 1, in order to allow the system to react
rapidly to a sudden load increase. The up/down
counter value is also intialised to 1 at the start-up, to
ensure an efficient maximum load start up.
shows some examples on how up/down counter is
changed according to the feedback voltage over time.
The use of two different thresholds V
count upward or downward is to prevent frequency
jittereing when the feedback voltage is close to the
threshold point. However, for a stable operation, these
two thresholds must not be affected by the foldback
current limitation (see Section 3.4.1), which limits the
V
Version 2.3
always lower than V
always lower than V
FB
CS
v
Always lower than V
Once higher than V
Once higher than V
Once higher than V
FB
, which contains information about the output
voltage. Hence, to prevent such situation, the
FB
Table
exceeds V
Up/down counter
Operation of the up/down counter
1.
FBZH
FBR1
FBR1
FBZL
FBZH
FBR1
FBZL
FB
, but
, but
voltage, the up/down counter
is internally compared with
RL
, V
FB
RH
up/down counter
action
Count upwards till
7
Stop counting, no
value changing
Count downwards
till 1
Set up/down
counter to 1
, the value in the up/
and V
FBZL
and V
RM
, at each
Figure 5
FBZH
to
8
threshold voltages, V
internally depending on the line voltage levels.
Figure 5
3.3.1.2
In the system, the voltage from the auxiliary winding is
applied to the zero-crossing pin through a RC network,
which provides a time delay to the voltage from the
auxiliary winding. Internally, this pin is connected to a
clamping network, a zero-crossing detector, an output
overvoltage detector and a ringing suppression time
controller.
During on-state of the power switch a negative voltage
applies to the ZC pin. Through the internal clamping
network, the voltage at the pin is clamped to certain
level.
The ZC counter has a minimum value of 0 and
maximum value of 7. After the internal MOSFET is
turned off, every time when the falling voltage ramp of
on ZC pin crosses the 100mV threshold, a zero
crossing is detected and ZC counter will increase by 1.
It is reset every time after the DRIVER output is
changed to high.
The voltage v
protection. Once the voltage at this pin is higher than
the threshold V
the IC is latched off after a fixed blanking time.
To achieve the switch-on at voltage valley, the voltage
from the auxiliary winding is fed to a time delay network
(the RC network consists of D
shown in typical application circuit) before it is applied
to the zero-crossing detector through the ZC pin. The
needed time delay to the main oscillation signal Dt
should be approximately one fourth of the oscillation
period (by transformer primary inductor and drain-
source capacitor) minus the propagation delay from
Up/down
counter
Case 1
Case 2
Case 3
clock
V
V
V
FBR1
FBZH
V
FBZL
FB
Up/down counter operation
Zero crossing (ZC counter)
4
2
7
ZC
ZCOVP
is also used for the output overvoltage
5
3
7
6
4
7
during off-time of the main switch,
Functional Description
FBZL
6
4
7
6
4
7
and V
T=48ms
zc
6
4
7
CoolSET
, R
FBZH
ICE2QR0665
zc1
5
3
6
, R
May 17, 2010
4
2
5
, are changed
zc2
3
1
4
and C
1
1
1
1
®
- Q1
zc
t
t
as