LAN9215-MT SMSC, LAN9215-MT Datasheet - Page 48

CONTROLLER, ENET, NON-PCI, 100TQFP

LAN9215-MT

Manufacturer Part Number
LAN9215-MT
Description
CONTROLLER, ENET, NON-PCI, 100TQFP
Manufacturer
SMSC
Datasheets

Specifications of LAN9215-MT

Data Rate
100Mbps
No. Of Ports
2
Ethernet Type
IEEE 802.3 / 802.3u
Supply Current
40mA
Supply Voltage Range
2.97V To 3.63V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
TQFP
Interface Type
HBI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Revision 1.93 (12-12-07)
3.12.2
Figure 3.13, "TX Buffer
noted that not all of the data shown in this diagram is actually stored in the TX data FIFO. This must
be taken into account when calculating the actual TX data FIFO usage. Please refer to
"Calculating Actual TX Data FIFO Usage," on page 52
actual TX data FIFO usage.
Note 3.14 The LAN9215i host bus interface supports 16-bit bus transfers; internally, all data paths
TX Command Format
The TX command instructs the TX FIFO controller on handling the subsequent buffer. The command
precedes the data to be transmitted. The TX command is divided into two, 32-bit words; TX command
‘A’ and TX command ‘B’.
There is a 16-bit packet tag in the TX command ‘B’ command word. Packet tags may, if host software
desires, be unique for each packet (i.e., an incrementing count). The value of the tag will be returned
in the RX status word for the associated packet. The Packet tag can be used by host software to
uniquely identify each status word as it is returned to the host.
Both TX command ‘A’ and TX command ‘B’ are required for each buffer in a given packet. TX
command ‘B’ must be identical for every buffer in a given packet. If the TX command ‘B’ words do not
match, the Ethernet controller will assert the Transmitter Error (TXE) flag.
are 32-bits wide.
transactions.
Host Write
Order
2nd
3rd
Last
1st
Format", shows the TX Buffer as it is written into the LAN9215i. It should be
Figure 3.13 TX Buffer Format
Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Figure 3.13
31
DATASHEET
Offset + Data DWORD0
Optional offset DWORDn
Optional offset DWORD0
Optional Pad DWORD0
Optional Pad DWORDn
TX Command 'A'
TX Command 'B'
Last Data & PAD
describes the host write ordering for pairs of atomic 16-bit
48
.
.
.
.
.
.
.
.
.
.
.
for a detailed explanation on calculating the
0
SMSC
Section 3.12.5,
LAN9215i
Datasheet

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