HEF4011UBP NXP Semiconductors, HEF4011UBP Datasheet
HEF4011UBP
Specifications of HEF4011UBP
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HEF4011UBP Summary of contents
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DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4011UB gates Quadruple 2-input NAND gate Product specification File under Integrated Circuits, ...
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... Fig.1 Functional diagram. Fig.3 Schematic diagram (one gate). The splitting-up of the n-transistors provide identical inputs. FAMILY DATA, I LIMITS category GATES DD See Family Specifications for V IH January 1995 HEF4011UBP(N): HEF4011UBD(F): HEF4011UBT(D Package Designator North America /V unbuffered stages IL 2 Product specification HEF4011UB gates Fig.2 Pinning diagram. 14-lead DIL ...
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Philips Semiconductors Quadruple 2-input NAND gate AC CHARACTERISTICS pF; input transition times SS amb L V Propagation delays HIGH to LOW 10 15 LOW to ...
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Philips Semiconductors Quadruple 2-input NAND gate January 1995 Fig.4 Typical transfer characteristics; one input, the other input connected (drain current Fig.5 Typical ...
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Philips Semiconductors Quadruple 2-input NAND gate Fig.7 Test set-up for measuring forward transconductance average average average 2 s, where ‘s’ is the observed standard deviation. Fig.8 Typical forward transconductance g January ...
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Philips Semiconductors Quadruple 2-input NAND gate APPLICATION INFORMATION Some examples of applications for the HEF4011UB are shown below. Because of the fact that this circuit is unbuffered suitable for use in (partly) analogue circuits. In Fig.9 the oscillation ...
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Philips Semiconductors Quadruple 2-input NAND gate Fig.10 Example of a crystal oscillator using one HEF4011UB gate. Fig.11 Output voltage as a function of supply voltage. January 1995 INH H Fig.12 Test set-up for measuring graph of Fig.11. Condition: all other ...
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Philips Semiconductors Quadruple 2-input NAND gate Fig.13 Voltage gain ( function of supply O I voltage. Fig.15 Test set-up for measuring graphs of Figs 13 and 14. Condition: all other inputs connected to ground. January 1995 ...