AU80610004392AAS LBLA Intel, AU80610004392AAS LBLA Datasheet - Page 46

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AU80610004392AAS LBLA

Manufacturer Part Number
AU80610004392AAS LBLA
Description
MPU, ATOM PRO, DUALCORE, D510, FC-BGA8
Manufacturer
Intel
Series
ATOM - D500r
Datasheet

Specifications of AU80610004392AAS LBLA

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.5.19
46
PAM1 - Programmable Attribute Map 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
from 0C0000h- 0C7FFFh.
This register controls the read, write, and shadowing attributes of the BIOS areas
7:6
5:4
3:2
1:0
Bit
Access
RW/L
RW/L
RO
RO
Default
Value
00b
00b
00b
00b
RST/
PWR
Core
Core
Core
Core
0/0/0/PCI
91h
00h
8 bits
RO; RW/L;
Reserved ()
0C4000-0C7FFF Attribute (HIENABLE):
write cycles that address the BIOS area from
0C4000 to 0C7FFF.
00: DRAM Disabled: Accesses are directed to
DMI.
01: Read Only: All reads are serviced by DRAM.
All writes are forwarded to DMI.
10: Write Only: All writes are sent to DRAM.
Reads are serviced by DMI.
11: Normal DRAM Operation: All reads and
writes are serviced by DRAM.
Reserved ()
0C0000-0C3FFF Attribute (LOENABLE):
write cycles that address the BIOS area from
0C0000 to 0C3FFF.
00: DRAM Disabled: Accesses are directed to
DMI.
01: Read Only: All reads are serviced by DRAM.
All writes are forwarded to DMI.
10: Write Only: All writes are sent to DRAM.
Reads are serviced by DMI.
11: Normal DRAM Operation: All reads and
writes are serviced by DRAM.
This field controls the steering of read and
This field controls the steering of read and
Processor Configuration Registers
Description
Datasheet

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