ADC12D040CIVS National Semiconductor, ADC12D040CIVS Datasheet
ADC12D040CIVS
Specifications of ADC12D040CIVS
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ADC12D040CIVS Summary of contents
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... This device is available in the 64-lead TQFP package and will operate over the industrial temperature range of −40˚C to +85˚C. TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2003 National Semiconductor Corporation Features n Binary/2’s complement output format n Single supply operation n Internal sample-and-hold n Outputs 2 ...
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... Connection Diagram Ordering Information Industrial (−40˚C ≤ T ADC12D040CIVS ADC12D040CIVSX ADC12D040EVAL www.national.com ≤ +85˚C) Package A 64 Pin TQFP 64 Pin TQFP Tape and Reel Evaluation Board 2 20046001 ...
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Block Diagram 3 20046002 www.national.com ...
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Pin Descriptions and Equivalent Circuits Pin No. Symbol ANALOG I A− B− REF 11 INT/EXT REF ...
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Pin Descriptions and Equivalent Circuits Pin No. Symbol 24–29 DA0–DA11 34–39 42–47 DB0–DB11 52–57 ANALOG POWER 9, 18 10, 17, 20, 61, AGND 64 DIGITAL POWER 33 32, 49 DGND ...
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... Absolute Maximum Ratings 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications – Voltage on Any Input or Output Pin Input Current at Any Pin (Note 3) Package Input Current (Note 3) Package Dissipation 25˚C A ESD Susceptibility ...
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Converter Electrical Characteristics Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V 0V, INT/EXT = +2.0V, OEA, OEB = 0V REF ...
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DC and Logic Electrical Characteristics Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V +3.0V 0V, INT/EXT = REF apply for ...
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AC Electrical Characteristics input voltage must be ≤4.85V to ensure accurate conversions. Note 8: To guarantee accuracy required that |V Note 9: With the test condition for V = +2.0V (4V REF Note 10: Typical figures are at ...
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Specification Definitions APERTURE DELAY is the time after the rising edge of the clock to when the input signal is acquired or held for conver- sion. APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample. ...
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Timing Diagram Transfer Characteristic Output Timing 20046010 FIGURE 1. Transfer Characteristic 11 20046009 www.national.com ...
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Typical Performance Characteristics otherwise stated @ Spectral Response Fin = 9.95 MHz MHz CLK Crosstalk Response Fin = 9.95 MHz MHz, F CROSSTALK INL www.national.com 5V IMD ...
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Typical Performance Characteristics otherwise stated (Continued) INL & DNL vs. Temperature DNL & INL vs. Clock Duty Cycle SNR, SINAD, SFDR vs. Supply Voltage 5V 3V DNL & INL vs. ...
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Typical Performance Characteristics otherwise stated (Continued) SNR, SINAD, SFDR vs. Clock Frequency SNR, SINAD, SFDR vs. Reference Voltage Distortion vs. Supply Voltage www.national.com 5V 3V SNR, SINAD, SFDR vs. Clock ...
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Typical Performance Characteristics otherwise stated (Continued) Distortion vs. Clock Frequency Distortion vs. Reference Voltage Power Consumption vs. Reference Voltage 5V 3V Distortion vs. Clock Duty Cycle 20046046 Distortion vs. Temperature ...
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Functional Description Operating on a single +5V supply, the ADC12D040 uses a pipeline architecture and has error correction circuitry to help ensure maximum performance. The differential analog input signal is digitized to 12 bits. The reference input is buffered to ...
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Applications Information FIGURE 3. Angular Errors Between the Two Input Signals Will Reduce the Output Level or Cause Distortion TABLE 1. Input to Output Relationship — Differential Input V V Binary Output − V − ...
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Applications Information FIGURE 4. Application Circuit using Transformer or Differential Op-Amp Drive Circuit www.national.com (Continued) 18 20046013 ...
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Applications Information FIGURE 5. Differential Drive Circuit of Figure 4 TABLE 3. Resistor Values for Circuit of Figure 5 SIGNAL RANGE 0 - 0.25V 140Ω 768Ω 226Ω 0.5V 255Ω 768Ω 976Ω 1.0V 464Ω ...
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Applications Information 2.2 OEA, OEB The OEA or OEB pin, when high, puts the output pins into a high impedance state. When this pin is low the outputs are in the active state. The ADC12D040 will continue to convert whether ...
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Applications Information other lines can introduce jitter into the clock line, which can lead to degradation of SNR. Also, the high speed clock can introduce noise into the analog chain. Be especially careful with the layout of inductors. Mutual inductance ...
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Applications Information FIGURE 7. Isolating the ADC Clock from other Circuitry with a Clock Tree 7.0 COMMON APPLICATION PITFALLS Driving the inputs (analog or digital) beyond the power supply rails. For proper operation, all inputs should not go more than ...
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... National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. inches (millimeters) unless otherwise noted 64-Lead TQFP Package Ordering Number ADC12D040CIVS NS Package Number VECO64A 2. A critical component is any component of a life ...