DS90CR215MTD National Semiconductor, DS90CR215MTD Datasheet

DS90CR215MTD

Manufacturer Part Number

DS90CR215MTD

Description

Transmitter IC

Manufacturer

National Semiconductor

Datasheets

1.DS90CR215MTD.pdf (17 pages)

2.DS90CR215MTD.pdf (17 pages)

3.DS90CR215MTD.pdf (16 pages)

Specifications of DS90CR215MTD

Peak Reflow Compatible (260 C)

Supply Voltage

3.3V

Supply Voltage Max

3.3V

Leaded Process Compatible

Mounting Type

Surface Mount

Package / Case

48-TSSOP

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

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Bonase Electronics (HK) Co., Limited

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DS90CR215MTD

Manufacturer:

Quantity:

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HIT

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Company:

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Part Number:

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Manufacturer:

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Quantity:

20 000

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Part Number:

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Manufacturer:

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Part Number:

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Manufacturer:

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Quantity:

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Company:

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Part Number:

DS90CR215MTDX

Manufacturer:

NSC

Quantity:

20 000

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

DS90CR215MTDX/NOPB

Manufacturer:

NSC

Quantity:

Company:

Meier Automation Equipment Co., Limited

Part Number:

DS90CR215MTDX/NOPB

Manufacturer:

TI/德州仪器

Quantity:

20 000

Current page: 1 of 17
Download datasheet (740Kb)

DS90CR215/DS90CR216

+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel

Link - 66 MHz

General Description

The DS90CR215 transmitter converts 21 bits of CMOS/TTL

data into three LVDS (Low Voltage Differential Signaling)

data streams. A phase-locked transmit clock is transmitted in

parallel with the data streams over a fourth LVDS link. Every

cycle of the transmit clock 21 bits of input data are sampled

and transmitted. The DS90CR216 receiver converts the

LVDS data streams back into 21 bits of CMOS/TTL data. At

a transmit clock frequency of 66 MHz, 21 bits of TTL data are

transmitted at a rate of 462 Mbps per LVDS data channel.

Using a 66 MHz clock, the data throughput is 1.386 Gbit/s

(173 Mbytes/s).

The multiplexing of the data lines provides a substantial

cable reduction. Long distance parallel single-ended buses

typically require a ground wire per active signal (and have

very limited noise rejection capability). Thus, for a 21-bit wide

data and one clock, up to 44 conductors are required. With

the Channel Link chipset as few as 9 conductors (3 data

pairs, 1 clock pair and a minimum of one ground) are

needed. This provides a 80% reduction in required cable

width, which provides a system cost savings, reduces con-

nector physical size and cost, and reduces shielding require-

ments due to the cables’ smaller form factor.

Block Diagrams

TRI-STATE

is a registered trademark of National Semiconductor Corporation.

See NS Package Number MTD48

Order Number DS90CR215MTD

DS90CR215

DS012909

01290901

The 21 CMOS/TTL inputs can support a variety of signal

combinations. For example, five 4-bit nibbles plus 1 control,

or two 9-bit (byte + parity) and 3 control.

Features

n Single +3.3V supply

n Chipset (Tx + Rx) power consumption

n Power-down mode (

n Up to 173 Megabytes/sec bandwidth

n Up to 1.386 Gbps data throughput

n Narrow bus reduces cable size

n 290 mV swing LVDS devices for low EMI

n +1V common mode range (around +1.2V)

n PLL requires no external components

n Low profile 48-lead TSSOP package

n Rising edge data strobe

n Compatible with TIA/EIA-644 LVDS standard

n ESD Rating

n Operating Temperature: −40˚C to +85˚C

See NS Package Number MTD48

Order Number DS90CR216MTD

7 kV

DS90CR216

0.5 mW total)

250 mW (typ)

www.national.com

August 2005

01290927

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