DSPIC30F4011T-30I/ML Microchip Technology, DSPIC30F4011T-30I/ML Datasheet
DSPIC30F4011T-30I/ML
Specifications of DSPIC30F4011T-30I/ML
Related parts for DSPIC30F4011T-30I/ML
DSPIC30F4011T-30I/ML Summary of contents
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... Refer to the “dsPIC30F Flash Programming Specification” (DS70102) for detailed information on Device and Revision IDs for your specific device. © 2010 Microchip Technology Inc. dsPIC30F4011/4012 For example, to identify the silicon revision level using MPLAB IDE in conjunction with MPLAB ICD 2 or PICkit™ ...
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... Sleep. The current consumption during Sleep may also increase beyond the specifications listed in the device data sheet. 2 The I C module loses incoming data bytes when operating slave. PTMR does not continue counting down after halting code execution in Debug mode. Affected (1) Revisions © 2010 Microchip Technology Inc. ...
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... Sleep Mode Note 1: Only those issues indicated in the last column apply to the current silicon revision. © 2010 Microchip Technology Inc. Issue Summary The Port I/O pin multiplexed with the Input Capture 1 (IC1) function cannot be used as a digital input pin when the UART auto-baud feature is enabled ...
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... PORTD will be modified by a write to address 0x0D4 PORTE will be modified by a write to address 0x0DA PORTF will be modified by a write to address 0x0E0 Work around User software should avoid writing to the unimplemented locations listed above. Affected Silicon Revisions © 2010 Microchip Technology Inc. ...
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... RAM register prior to performing the operations listed in Table 3. The work around for Example 2 is demonstrated in Example 3. © 2010 Microchip Technology Inc. dsPIC30F4011/4012 These instructions are identified in Table 3. Example 2 demonstrates one scenario where this occurs ...
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... Use 8x PLL or 16x PLL mode of operation and set final device clock speed using the POST<1:0> oscillator postscaler control bits (OSCCON<7:6>). 2. Use the EC without PLL Clock mode with a suitable clock frequency to obtain the equivalent 4x PLL clock rate. Affected Silicon Revisions © 2010 Microchip Technology Inc. ...
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... SET_AND_SAVE_CPU_IPL (save_to RESTORE_CPU_IPL (save_to) © 2010 Microchip Technology Inc. dsPIC30F4011/4012 Work around 2: For C Language Source Code For applications using the C language, MPLAB C30 versions 1.32 and higher provide several macros for modifying the CPU IPL. The SET_CPU_IPL macro provides the ability to safely modify the CPU IPL, as shown in Example 6 ...
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... SET_AND_SAVE_CPU_IPL (save_sr, 7);\ x; \ RESTORE_CPU_IPL (save_sr); } (void INTERRUPT_PROTECT (IEC0bits.U1TXIE=0); Note: If you are using a MPLAB C30 compiler version earlier than version 1.32, you may still use the macros by adding them to your application. Affected Silicon Revisions DS80454D-page 8 © 2010 Microchip Technology Inc. ...
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... © 2010 Microchip Technology Inc. dsPIC30F4011/4012 9. Module: Output Compare If the desired duty cycle is ‘0’ (OCxRS = 0), the module will generate a high level glitch The second problem is that on the next cycle after the glitch, the OC pin does not go high other words, it misses the next compare for any value written on OCxRS ...
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... A/D Channels Configuration REF REF CH X ANx S/H ADC REF REF ANx S/H ADC ANx REF REF REF ANx S/H ADC ANx REF © 2010 Microchip Technology Inc ...
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... User's code } void __attribute__((__interrupt__)) _QEIInterrupt(void) { IFSxbits.QEIIF = 0; POSCNT_b15 ^= 0x8000; // Overflow or Underflow } © 2010 Microchip Technology Inc. dsPIC30F4011/4012 Work around To prevent this condition from occurring, set MAXCNT to 0x7FFF, which will cause an interrupt to be generated by the QEI module. In addition, a global variable could be used to keep ...
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... GotoSleep( ) function call. This ensures that the device continues executing the correct code sequence after waking up from Sleep mode. Example 10 demonstrates the work around described above. ; Ensure flag is reset ; Return from Interrupt Service Routine the function call would be © 2010 Microchip Technology Inc. ...
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... Note: The above work around is recommended for users for whom application hardware changes are not possible. © 2010 Microchip Technology Inc. dsPIC30F4011/4012 Work around 3: Instead of executing a PWRSAV #0 instruction to put the device into Sleep mode, perform a clock switch to the 32 kHz Low-Power (LP) Oscillator with a 64:1 postscaler mode ...
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... If the PTDIR bit is set (when PTMR is counting down), and the CPU execution is halted (after a breakpoint is reached), PTMR will start counting PTDIR was zero. Work around None. Affected Silicon Revisions © 2010 Microchip Technology Inc slave interrupt 2 C nodes receive 2 C data 2 C nodes. This X X ...
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... Affected Silicon Revisions © 2010 Microchip Technology Inc. dsPIC30F4011/4012 21. Module: PLL The PLL LOCK Status bit (OSCCON<5>) can occasionally get cleared and generate an oscillator failure trap even when the PLL is still locked and functioning correctly. Work around The user application must include an oscillator failure trap service routine ...
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... C bus, and can cause 2 C module are set to values ‘1’ and 2 C module and the first data 2 C masters should be synchro module to be initialized 2 C module is with other modules that have 2 C module module © 2010 Microchip Technology Inc ...
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... Note 1: The shaded bits labelled “B” represent the bits that may be corrupted on a write operation. 2: The memory map shown here depicts only the first twelve bytes of device EEPROM. © 2010 Microchip Technology Inc. dsPIC30F4011/4012 Work around 3: Avoid using every fourth byte. Example 11 shows how the ASM30 assembler can be used to allocate data in the EEPROM under this constraint ...
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... ADC module by setting the ADC Module Disable bit in the corresponding Peripheral Module (PMDx) register, prior to executing a PWRSAV #0 instruction. Affected Silicon Revisions © 2010 Microchip Technology Inc. increment of specifications Disable ...
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... Param Symbol Characteristic No. V Input Low Voltage IL DI19 SDA, SCL V Input High Voltage IH DI29 SDA, SCL © 2010 Microchip Technology Inc. dsPIC30F4011/4012 specifica- IL Standard Operating Conditions: 3.3V and 5.0V (±10%) (unless otherwise stated) Operating temperature Min Typ Max V — 0.8 SS 2.1 — ...
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... Updated silicon issue 7 (Interrupt Controller). Added silicon issues 30 (QEI) and 31 (QEI). Rev C Document (2/2010) Updated silicon issue 7 (Interrupt Controller). Rev D Document (6/2010) Added silicon issue 32 (ADC) and data sheet clarification 1 (DC Characteristics: I/O Pin Input Specifications). DS80454D-page 20 2 C), 17 (PWM), © 2010 Microchip Technology Inc. ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2010 Microchip Technology Inc. 01/05/10 ...