PIC18F2423-I/ML Microchip Technology, PIC18F2423-I/ML Datasheet - Page 29

16KB, Flash, 768bytes-RAM, 25I/O, 8-bit Family,nanoWatt 28 QFN 6x6mm TUBE

PIC18F2423-I/ML

Manufacturer Part Number
PIC18F2423-I/ML
Description
16KB, Flash, 768bytes-RAM, 25I/O, 8-bit Family,nanoWatt 28 QFN 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2423-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
The value in the ADRESH:ADRESL registers is
unknown following POR and BOR Resets and is not
affected by any other Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as inputs.
To determine acquisition time, see Section 2.1 “A/D
Acquisition Requirements”.
After this acquisition time has elapsed, the A/D conver-
sion can be started. An acquisition time can be
programmed to occur between setting the GO/DONE
bit and the actual start of the conversion.
The following steps should be followed to perform an A/D
conversion:
1.
2.
3.
4.
FIGURE 2-3:
© 2009 Microchip Technology Inc.
Configure the A/D module:
• Configure analog pins, voltage reference and
• Select A/D input channel (ADCON0)
• Select A/D acquisition time (ADCON2)
• Select A/D conversion clock (ADCON2)
• Turn on the A/D module (ADCON0)
Configure the A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
Wait the required acquisition time (if required).
Start conversion by setting the GO/DONE bit
(ADCON0<1>).
digital I/O (ADCON1)
Legend: C
V
AIN
Rs
ANALOG INPUT MODEL
V
I
R
SS
C
R
LEAKAGE
T
PIN
IC
HOLD
SS
ANx
C
5 pF
PIN
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to
= Interconnect Resistance
= Sampling Switch
= Sample/Hold Capacitance (from DAC)
= Sampling Switch Resistance
various junctions
V
PIC18F2423/2523/4423/4523
DD
V
V
T
T
= 0.6V
= 0.6V
I
±100 nA
5.
6.
7.
FIGURE 2-2:
LEAKAGE
R
Wait for the A/D conversion to complete by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read the A/D Result registers (ADRESH:ADRESL)
and clear the ADIF bit, if required.
For the next conversion, go to step 1 or step 2,
as required.
The A/D conversion time per bit is defined as
T
the next acquisition starts.
FFEh
FFFh
IC
003h
002h
001h
000h
AD
≤ 1k
. A minimum wait of 2 T
V
Sampling
SS
DD
Switch
6V
5V
4V
3V
2V
R
Analog Input Voltage
SS
A/D TRANSFER FUNCTION
Sampling Switch
1
V
C
SS
2
AD
HOLD
3
is required before
= 25 pF
DS39755C-page 29
4
(kΩ)

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