LFE3-95EA-PCIE-DKN Lattice, LFE3-95EA-PCIE-DKN Datasheet - Page 10

• Manufacturer Part Number: LFE3-95EA-PCIE-DKN
• Description: MCU, MPU & DSP Development Tools LatticeECP3-95EA PCI Express Dev Kit
• Manufacturer: Lattice
• Series: ECP3r

Specifications of LFE3-95EA-PCIE-DKN

• Silicon Manufacturer: Lattice Semiconductor
• Silicon Family Name: LatticeECP3
• Kit Contents: Board
• Features: On-board Boot Flash, Switches, LEDs, Displays For Demo Purposes
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Main Purpose: Interface, Connectivity
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: LatticeECP3 FPGA Device Family
• Primary Attributes: x1/x4 PCI Express Edge Connectors, Both Serial SPI Flash and Parallel Flash
• Secondary Attributes: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
• D10 (green) will flash indicating TDI activity.
• D8 (red) illuminated, this indicates that PROGRAMN is low.
• D7 (red) illuminated, this indicates that GSRN is low.
PROGRAMN & GSRN
(see Appendix A, Figure 23)
• These push-button switches assert/de-assert the logic levels on the PROGRAMN (SW3 or SW7) and GSRN
• These push-buttons are accessible from the back panel if the evaluation board is mounted in a PCI Express slot
CFG [2:0]
(see Appendix A, Figure 23)
• The FPGA CFG pins are set on the board for a particular programming mode via the SW2 DIP switch.
• JTAG programming is independent of the MODE pins and is always available to the user.
• Pushing in (depressing) the switch is ON and sets the value to 0.
Table 6. CFG Mode Selections
On-Board Serial SPI Flash Memory
(see Appendix A, Figure 23)
• One Serial SPI (16-pin tssop 64M) Flash memory device (U6) is on-board for non-volatile configuration memory
• All CFG [2:0] need to be [000] depressed to read the Flash memory at power-up or after toggling the PRO-
• Install jumper across pins 2 and 4 on J2.
Programming Serial SPI Flash Memory
The Serial SPI Flash memory device can be configured easily via its JTAG port. This mode enables the FPGA to
be programmed at power-up or assertion of PROGRAMN with a bitstream stored in the memory device.
1. Connect the LatticeECP3 PCI Express Solutions Board to the appropriate power sources and power-up board.
2. Connect the ispDOWNLOAD cable to the appropriate header. J4 is used with the cable.
3. Start the ispVM System software.
4. Press the SCAN button located in the toolbar. The LFE3-95 and the LCMXO1200C devices should be automat-
(SW1 or SW6). Depressing the button drives a logic level “0” to the device.
of a PC.
storage. Either a STMicro M25P64VMF16 or Macronix MX25L6405 device is populated on-board.
GRAMN pin.
ically detected.
(don’t care)
1 (OFF)
1 (OFF)
0 (ON)
0 (ON)
CFG2
X
(don’t care)
1 (OFF)
1 (OFF)
0 (ON)
0 (ON)
LatticeECP3 PCI Express Solutions Board – Revision A
CFG1
X
10
(don’t care)
1 (OFF)
1 (OFF)
0 (ON)
0 (ON)
CFG0
X
Configuration Mode
Slave Parallel
Slave Serial
ispJTAG™
SPI Flash
SPIm
User’s Guide