5M160ZM100A5N Altera, 5M160ZM100A5N Datasheet - Page 26

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5M160ZM100A5N

Manufacturer Part Number
5M160ZM100A5N
Description
ALTERA
Manufacturer
Altera
Series
MAX® Vr
Datasheets

Specifications of 5M160ZM100A5N

Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
1.71 V ~ 1.89 V
Number Of Logic Elements/blocks
160
Number Of Macrocells
128
Number Of Gates
-
Number Of I /o
79
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Vendor undefined / RoHS Compliant
3–26
Table 3–39. Emulated LVDS Output Timing Specifications for MAX V Devices
MAX V Device Handbook
Data rate (1),
t
Total jitter
t
t
Notes to
(1) The performance of the LVDS_E_3R transmitter system is limited by the lower of the two—the maximum data rate supported by LVDS_E_3R
(2) For the input clock pin to achieve 304 Mbps, use I/O standard with V
(3) This specification is based on external clean clock source.
DUTY
RISE
FALL
I/O buffer or 2x (F
the Quartus II timing analysis of the complete design.
Parameter
Table
LVDS and RSDS Output Timing Specifications
(3)
3–39:
(2)
MAX
of the ALTLVDS_TX instance). The actual performance of your LVDS_E_3R transmitter system must be attained through
Table 3–38. Maximum Output Clock Rate for I/Os for MAX V Devices (Part 2 of 2)
Table 3–39
2.5-V LVCMOS
1.8-V LVTTL
1.8-V LVCMOS
1.5-V LVCMOS
1.2-V LVCMOS
3.3-V PCI
LVDS
RSDS
lists the emulated LVDS output timing specifications for MAX V devices.
I/O Standard
Mode
10
9
8
7
6
5
4
3
2
1
CCIO
of 2.5 V and above.
Chapter 3: DC and Switching Characteristics for MAX V Devices
Min
45
5M240Z/ 5M570Z/5M1270Z/
5M40Z/ 5M80Z/ 5M160Z/
5M240Z/ 5M570Z/5M1270Z/
5M40Z/ 5M80Z/ 5M160Z/
C4, C5, I5
5M2210Z
C4, C5, I5
5M2210Z
304
200
304
200
200
150
120
304
January 2011 Altera Corporation
Timing Model and Specifications
Max
304
304
304
304
304
304
304
304
304
304
450
450
0.2
55
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit
UI
ps
ps
%

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