AD5440YRUZ Analog Devices Inc, AD5440YRUZ Datasheet - Page 20

IC,D/A CONVERTER,DUAL,10-BIT,CMOS,TSSOP,24PIN

AD5440YRUZ

Manufacturer Part Number
AD5440YRUZ
Description
IC,D/A CONVERTER,DUAL,10-BIT,CMOS,TSSOP,24PIN
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5440YRUZ

Settling Time
35ns
Number Of Bits
10
Data Interface
Parallel
Number Of Converters
2
Voltage Supply Source
Single Supply
Power Dissipation (max)
3.3µW
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Number Of Channels
2
Resolution
10b
Conversion Rate
21.3MSPS
Interface Type
Parallel
Single Supply Voltage (typ)
3.3/5V
Dual Supply Voltage (typ)
Not RequiredV
Architecture
R-2R
Power Supply Requirement
Single
Output Type
Current
Integral Nonlinearity Error
±0.5+/- LSB
Single Supply Voltage (min)
2.5V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
24
Package Type
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD5440EBZ - BOARD EVAL FOR AD5440
Lead Free Status / Rohs Status
Compliant

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AD5428/AD5440/AD5447
DIVIDER OR PROGRAMMABLE GAIN ELEMENT
Current-steering DACs are very flexible and lend themselves to
many applications. If this type of DAC is connected as the
feedback element of an op amp and R
resistor, as shown in Figure 43, the output voltage is inversely
proportional to the digital input fraction, D.
For D = 1 − 2
As D is reduced, the output voltage increases. For small values
of the digital fraction D, it is important to ensure that the
amplifier does not saturate and that the required accuracy is
met. For example, an 8-bit DAC driven with the binary code
0x10 (0001 0000)—that is, 16 decimal—in the circuit of
Figure 43 should cause the output voltage to be 16 times V
However, if the DAC has a linearity specification of ±0.5 LSB, D
can have a weight in the range of 15.5/256 to 16.5/256 so that the
possible output voltage is in the range of 15.5 V
an error of 3%, even though the DAC itself has a maximum
error of 0.2%.
DAC leakage current is also a potential error source in divider
circuits. The leakage current must be counterbalanced by an
opposite current supplied from the op amp through the DAC.
Because only a fraction, D, of the current into the V
is routed to the I
follows:
Output Error Voltage Due to DAC Leakage
where R is the DAC resistance at the V
For a DAC leakage current of 10 nA, R = 10 kΩ, and a gain (that
is, 1/D) of 16, the error voltage is 1.6 mV.
V
OUT
=
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
V
Figure 43. Current-Steering DAC Used as a Divider or
IN
V
−n
IN
, the output voltage is
/
OUT
AGND
I
D
OUT
1 terminal, the output voltage changes as
=
Programmable Gain Element
A
R
FB
V
A V
IN
GND
V
DD
DD
/
(
1
2
V
REF
n
)
A
FB
REF
A is used as the input
terminal.
=
(
Leakage
V
IN
OUT
to 16.5 V
REF
×
terminal
R
)
/
IN
IN
D
.
Rev. B | Page 20 of 32
REFERENCE SELECTION
When selecting a reference for use with the AD54xx series of
current output DACs, pay attention to the reference’s output
voltage temperature coefficient specification. This parameter not
only affects the full-scale error, but can also affect the linearity
(INL and DNL) performance. The reference temperature
coefficient should be consistent with the system accuracy
specifications. For example, an 8-bit system required to hold its
overall specification to within 1 LSB over the temperature range
0° to 50°C dictates that the maximum system drift with temp-
erature should be less than 78 ppm/°C. A 12-bit system with the
same temperature range to overall specification within 2 LSBs
requires a maximum drift of 10 ppm/°C. Choosing a precision
reference with low output temperature coefficient minimizes this
error source. Table 9 lists some references available from Analog
Devices that are suitable for use with these current output DACs.
AMPLIFIER SELECTION
The primary requirement for the current-steering mode is an
amplifier with low input bias currents and low input offset
voltage. Because of the code-dependent output resistance of the
DAC, the input offset voltage of an op amp is multiplied by the
variable gain of the circuit. A change in the noise gain between
two adjacent digital fractions produces a step change in the
output voltage due to the amplifier’s input offset voltage. This
output voltage change is superimposed on the desired change in
output between the two codes and gives rise to a differential
linearity error, which, if large enough, could cause the DAC to
be nonmonotonic. The input offset voltage should be <1/4 LSB
to ensure monotonic behavior when stepping through codes.
The input bias current of an op amp also generates an offset at
the voltage output as a result of the bias current flowing in the
feedback resistor, R
low enough to prevent significant errors in 12-bit applications.
Common-mode rejection of the op amp is important in voltage-
switching circuits, because it produces a code-dependent error
at the voltage output of the circuit. Most op amps have adequate
common-mode rejection for use at 8-, 10-, and 12-bit resolution.
Provided that the DAC switches are driven from true wideband,
low impedance sources (V
Consequently, the slew rate and settling time of a voltage-
switching DAC circuit is determined largely by the output op
amp. To obtain minimum settling time in this configuration,
minimize capacitance at the V
in this application) of the DAC by using low input capacitance
buffer amplifiers and careful board design.
Most single-supply circuits include ground as part of the analog
signal range, which in turns requires an amplifier that can handle
rail-to-rail signals. Analog Devices offers a wide variety of single-
supply amplifiers (see Table 10 and Table 11).
FB
. Most op amps have input bias currents
IN
and AGND), they settle quickly.
REF
node (the voltage output node

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