AD7707BR Analog Devices Inc, AD7707BR Datasheet - Page 36

• Manufacturer Part Number: AD7707BR
• Description: A/D Converter (A-D) IC
• Manufacturer: Analog Devices Inc

Specifications of AD7707BR

• Peak Reflow Compatible (260 C): No
• No. Of Bits: 16 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Features: 3V/5V, 1mW, 2?Channel, 16?Bit
• Package / Case: 20-SOIC
• Rohs Status: RoHS non-compliant
• Number Of Bits: 16
• Sampling Rate (per Second): 500
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 1mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD7707
DIGITAL INTERFACE
As previously outlined, the AD7707’s programmable functions
are controlled using a set of on-chip registers. Data is written to
these registers via the part’s serial interface and read access to
the on-chip registers is also provided by this interface. All commu-
nications to the part must start with a write operation to the
communications register. After power-on or RESET , the device
expects a write to its communications register. The data written to
this register determines whether the next operation to the part
is a read or a write operation and also determines to which register
this read or write operation occurs. Therefore, write access to
any of the other registers on the part starts with a write operation to
the communications register followed by a write to the selected
register. A read operation from any other register on the part
(including the data register) starts with a write operation to the
communications register followed by a read operation from the
selected register.
The AD7707 serial interface consists of five signals CS , SCLK,
DIN, DOUT, and DRDY . The DIN line is used for transferring
data into the on-chip registers, and the DOUT line is used for
accessing data from the on-chip registers. SCLK is the serial clock
input for the device and all data transfers (either on DIN or
DOUT) take place with respect to this SCLK signal. The DRDY
line is used as a status signal to indicate when data is ready to be
read from the AD7707 data register. DRDY goes low when a
new data word is available in the output register. It is reset high
when a read operation from the data register is complete. It also
goes high prior to the updating of the output register to indicate
when not to read from the device to ensure that a data read is
not attempted while the register is being updated. CS is used to
select the device. It can be used to decode the AD7707 in systems
where a number of parts are connected to the serial bus.
Figure 20 and Figure 21 show timing diagrams for interfacing to
the AD7707 with CS used to decode the part.
read operation from the AD7707’s output shift register whereas
Figure 21
possible to read the same data twice from the output register
even though the
operation. Care must be taken, however, to ensure that the read
operations have been completed before the next output update
is about to take place.
shows a write operation to the input shift register. It is
DRDY line returns high after the first read
Figure 20
is for a
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The AD7707 serial interface can operate in 3-wire mode by
tying the CS input low. In this case, the SCLK, DIN, and DOUT
lines are used to communicate with the AD7707 and the status
of DRDY can be obtained by interrogating the MSB of the
communications register. This scheme is suitable for interfacing to
microcontrollers. If CS is required as a decoding signal, it can
be generated from a port bit. For microcontroller interfaces, it is
recommended that SCLK idles high between data transfers.
The AD7707 can also be operated with CS used as a frame
synchronization signal. This scheme is suitable for DSP interfaces.
In this case, the first bit (MSB) is effectively clocked out by CS
because CS normally occurs after the falling edge of SCLK in
DSPs. The SCLK can continue to run between data transfers
provided
The serial interface can be reset by exercising the RESET input
on the part. It can also be reset by writing a series of 1s on the
DIN input. If a Logic 1 is written to the AD7707 DIN line for at
least 32 serial clock cycles, the serial interface is reset. This ensures
that in 3-wire systems, if the interface is lost either via a
software error or by a glitch in the system, it can be reset back
to a known state. This state returns the interface to where the
AD7707 is expecting a write operation to its communications
register. This operation in itself does not reset the contents of
any registers but because the interface was lost, the information
written to any of the registers is unknown and it is advisable to
set up all registers again.
Some microprocessor or microcontroller serial interfaces have a
single serial data line. In this case, it is possible to connect the
AD7707’s DATA OUT and DATA IN lines together and connect
them to the single data line of the processor. A 10 kΩ pull-up
resistor should be used on this single data line. In this case, if
the interface is lost, because the read and write operations share
the same line, the procedure to reset it back to a known state is
somewhat different than previously described. It requires a read
operation of 24 serial clocks followed by a write operation
where a Logic 1 is written for at least 32 serial clock cycles to
ensure that the serial interface is back into a known state.
the timing numbers are obeyed.