AD8124ACPZ Analog Devices Inc, AD8124ACPZ Datasheet - Page 12

• Manufacturer Part Number: AD8124ACPZ
• Description: Triple Cat5 Cable Equalizer
• Manufacturer: Analog Devices Inc

Specifications of AD8124ACPZ

• Rohs Compliant: YES
• Bandwidth: 110MHz
• Supply Voltage Range: ± 4.5V To ± 5.5V
• No. Of Pins: 40
• Operating Temperature Range: -40°C To +85°C
• Peak Reflow Compatible (260 C): Yes
• Leaded Process Compatible: Yes
• Digital Ic Case Style: LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD8124
SYNC PULSE EXTRACTION USING COMPARATORS
The AD8124 is useful in many systems that transport computer
video signals, which typically comprise red, green, and blue (RGB)
video signals and separate horizontal and vertical sync signals.
Because the sync signals are separate and not embedded in the
color signals, it is advantageous to transmit them using a simple
scheme that encodes them among the three common-mode
voltages of the RGB signals. The AD8134, AD8142, AD8147, and
AD8148
the AD8124 because they perform the sync pulse encoding with
the necessary circuitry on-chip.
The sync encoding equations follow:
where:
Red V
mode voltages of the respective color signals.
K is an adjustable gain constant that is set by the driver.
V and H are the vertical and horizontal sync pulses, defined
with a weight of −1 when the pulses are in their low states and a
weight of +1 when they are in their high states.
The AD8134, AD8142, and AD8146/AD8147/AD8148 data
sheets contain further details regarding the encoding scheme.
Figure 19 illustrates how the AD8124 comparators can be used to
extract the horizontal and vertical sync pulses that are encoded on
the RGB common-mode voltages by the aforementioned drivers.
USING THE V
The V
compensate for the low-pass roll-off in the cable response. The
V
that shifts the positions of the equalizer poles. The V
controls the wideband flat gain and is used to compensate for
the low frequency cable loss that is nominally flat. The V
input is used to produce an offset at the AD8124 output. The
output offset is equal to the voltage applied to the V
limited by the output swing limits.
The V
can be coupled to form a single peaking control. While Figure 16
and Figure 17 show recommended settings vs. cable length,
designers may find other combinations that they prefer. These
two controls give designers extra freedom, as well as the ability
to compensate for different cable types (such as UTP and coaxial
cable), as opposed to having only a single frequency shaping
control.
POLE
Green
Red
Blue
input is a secondary frequency response shaping control
CM
PEAK
PEAK
, Green V
triple differential drivers are natural complements to
V
V
input is the main peaking control and is used to
and V
CM
V
CM
CM
=
=
=
K
PEAK
POLE
2
K
2
CM
K
[
2
V
[
, and Blue V
V
, V
controls can be used independently or they
[
−
−
+
2
H
POLE
H
V
]
]
]
, V
GAIN
CM
are the transmitted common-
, AND V
OFFSET
INPUTS
OFFSET
GAIN
OFFSET
input
input,
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(1)
(2)
(3)
In some cases, as would likely be with automatic control, the
V
an op amp. Figure 20 shows how to derive V
UTP application according to the recommended curves shown
in Figure 16 when V
Clearly, the 5 V supply must be clean to provide a clean V
voltage.
The 20 Ω series resistor in the V
buffering for the op amp. This value can be modified, depending
on the actual capacitive load.
In automatic equalization circuits that place the control voltages
inside feedback loops, attention must be paid to the poles produced
by the summing resistors and load capacitances.
The peaking can also be adjusted by a mechanical or digitally
controlled potentiometer. In these cases, if the resistance of the
potentiometer is a couple of orders of magnitude lower than the
values of the resistors used to develop V
ignored. Figure 21 shows how to use a 500 Ω potentiometer with
the resistor values shown in Figure 20 scaled up by a factor of 10.
Many potentiometers have wide tolerances. If a wide tolerance
potentiometer is used, it may be necessary to change the value
of the 750 Ω resistor to obtain a full swing for V
The V
by adjusting it to produce the correct amplitude of a known test
signal (such as a white screen) at the AD8124 output.
V
relationships shown in Figure 16 and Figure 17. Figure 22 shows
how to derive V
that originates from a low-Z source.
Figure 22. Deriving V
Figure 21. Deriving V
PEAK
GAIN
Figure 20. Deriving V
control is derived from a low impedance source, such as
can also be derived from V
GAIN
750Ω
500Ω
input is essentially a contrast control and can be set
V
PEAK
5V
V
PEAK
POLE
POLE
POLE
51.1kΩ
5.11kΩ
5.11kΩ
PEAK
POLE
and V
and V
5.11kΩ
from V
from V
originates from a low impedance source.
20Ω
GAIN
GAIN
20Ω
82.5kΩ
from V
PEAK
5V
8.25kΩ
133kΩ
5V
5V
PEAK
140kΩ
8.25kΩ
14kΩ
60.4kΩ
5V
with a Potentiometer for the UTP Cable
from V
PEAK
V
with Low-Z Source for the UTP Cable
PEAK
14kΩ
PEAK
PEAK
V
PEAK
path provides capacitive load
V
with Low-Z Source for the UTP Cable
V
V
POLE
V
POLE
GAIN
according to the linear
PEAK
PEAK
V
POLE
POLE
≈
≈ 0.89 × V
≈
in a UTP application
V
≈
, its resistance can be
V
PEAK
2
POLE
PEAK
V
2
PEAK
2
PEAK
PEAK
+ 0.9V
from V
+ 0.9V
+ 0.9V
.
+ 0.38V
PEAK
POLE
in a