AD9222BCPZRL7-65 Analog Devices Inc, AD9222BCPZRL7-65 Datasheet - Page 40

IC,A/D CONVERTER,OCTAL,12-BIT,LLCC,64PIN

AD9222BCPZRL7-65

Manufacturer Part Number
AD9222BCPZRL7-65
Description
IC,A/D CONVERTER,OCTAL,12-BIT,LLCC,64PIN
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9222BCPZRL7-65

Number Of Bits
12
Sampling Rate (per Second)
65M
Data Interface
Serial, SPI™
Number Of Converters
8
Power Dissipation (max)
950.5mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9222-65EBZ - BOARD EVALUATION AD9222 65MSPSAD9222-50EBZ - BOARD EVALUATION FOR AD9222
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9222BCPZRL7-65
Manufacturer:
AD
Quantity:
1 001
AD9222
EVALUATION BOARD
The AD9222 evaluation board provides all of the support cir-
cuitry required to operate the ADC in its various modes and
configurations. The converter can be driven differentially using a
transformer (default) or an
driven in a single-ended fashion. Separate power pins are provided
to isolate the DUT from the drive circuitry of the AD8334. Each
input configuration can be selected by changing the connection
of various jumpers (see Figure 90 to Figure 94). Figure 86 shows
the typical bench characterization setup used to evaluate the ac
performance of the AD9222. It is critical that the signal sources
used for the analog input and clock have very low phase noise
(<1 ps rms jitter) to realize the optimum performance of the
converter. Proper filtering of the analog input signal to remove
harmonics and lower the integrated or broadband noise at the
input is also necessary to achieve the specified noise performance.
See Figure 90 to Figure 100 for the complete schematics and
layout diagrams demonstrating the routing and grounding
techniques that should be applied at the system level.
POWER SUPPLIES
This evaluation board has a wall-mountable switching power
supply that provides a 6 V, 2 A maximum output. Connect the
supply to the rated 100 V ac to 240 V ac wall outlet at 47 Hz to
63 Hz. The other end of the supply is a 2.1 mm inner diameter
jack that connects to the PCB at P701. Once on the PC board,
the 6 V supply is fused and conditioned before connecting to
three low dropout linear regulators that supply the proper bias
to each of the various sections on the board.
When operating the evaluation board in a nondefault condition,
L701 to L704 can be removed to disconnect the switching power
supply. This enables the user to bias each section of the board
individually. Use P702 to connect a different supply for each
WALL OUTLET
100V TO 240V AC
47Hz TO 63Hz
ROHDE & SCHWARZ,
ROHDE & SCHWARZ,
2V p-p SIGNAL
SYNTHESIZER
2V p-p SIGNAL
SYNTHESIZER
SMA,
SMA,
SWITCHING
SUPPLY
POWER
BAND-PASS
FILTER
2A MAX
AD8334
6V DC
XFMR
INPUT
CLK
driver. The ADC can also be
5.0V
EVALUATION BOARD
+
AD9222
1.8V
+
Figure 86. Evaluation Board Connection
1.8V
Rev. D | Page 40 of 60
+
CH A TO CH H
3.3V
+
SERIAL
12-BIT
LVDS
SPI
section. At least one 1.8 V supply is needed for AVDD_DUT and
DRVDD_DUT; however, it is recommended that separate supplies
be used for both analog and digital signals and that each supply
have a current capability of 1 A. To operate the evaluation board
using the VGA option, a separate 5.0 V analog supply (AVDD_5 V)
is needed. To operate the evaluation board using the SPI and alter-
nate clock options, a separate 3.3 V analog supply (AVDD_3.3 V) is
needed in addition to the other supplies.
INPUT SIGNALS
When connecting the clock and analog sources to the evalu-
ation board, use clean signal generators with low phase noise,
such as Rohde & Schwarz SMA or HP8644 signal generators or the
equivalent, as well as a 1 m, shielded, RG-58, 50 Ω coaxial cable.
Enter the desired frequency and amplitude from the ADC specifi-
cations tables. Typically, most Analog Devices, Inc., evaluation
boards can accept approximately 2.8 V p-p or 13 dBm sine wave
input for the clock. When connecting the analog input source, it
is recommended to use a multipole, narrow-band, band-pass
filter with 50 Ω terminations. Good choices of such band-pass
filters are available from TTE, Allen Avionics, and K&L
Microwave, Inc. The filter should be connected directly to the
evaluation board if possible.
OUTPUT SIGNALS
The default setup uses the Analog Devices HSC-ADC-FPGA-8Z
high speed deserialization board to deserialize the digital output
data and convert it to parallel CMOS. These two channels interface
directly with the Analog Devices standard dual-channel FIFO
data capture board (HSC-ADC-EVALB-DCZ). Two of the eight
channels can then be evaluated at the same time. For more infor-
mation on the channel settings and optional settings of these
boards, visit www.analog.com/FIFO.
HSC-ADC-FPGA-8Z
DESERIALIZATION
3.3V
HIGH SPEED
BOARD
+
SPI
PARALLEL
1.5V
12-BIT
CMOS
2-CH
+
HSC-ADC-EVALB-DCZ
FIFO DATA
CAPTURE
BOARD
CONNECTION
3.3V
SPI
+
USB
SPI
SOFTWARE
ANALYZER
RUNNING
AND SPI
USER
ADC
PC

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