AD976AR Analog Devices Inc, AD976AR Datasheet - Page 10

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AD976AR

Manufacturer Part Number
AD976AR
Description
A/D Converter (A-D) IC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD976AR

Package/case
28-SOIC
Features
16?Bit, Serial, 100kSPS ADC
Interface Type
Parallel
Leaded Process Compatible
No
Number Of Bits
16
Number Of Channels
1
Peak Reflow Compatible (260 C)
No
Rohs Status
RoHS non-compliant
Sampling Rate (per Second)
200k
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
100mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-AD976CB - BOARD EVAL FOR AD976EVAL-AD976ACB - BOARD EVAL FOR AD976A
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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OFFSET AND GAIN ADJUSTMENT
The AD976/AD976A is factory trimmed to minimize gain,
offset and linearity errors. In some applications, where the ana-
log input signal is required to meet the full dynamic range of the
ADC, the gain and offset errors need to be externally trimmed
to zero. Figure 7 shows the required trim circuitry to correct for
these offset and gain errors. Figure 8 shows the bipolar transfer
characteristic of the AD976/AD976A.
Where adjustment is required, offset error must be corrected
before gain error. To achieve this, trim the offset resistor R3
while the input voltage is 1/2 LSB below ground. By applying
a voltage of –152.6 V at the input and adjusting the potentiom-
eter until the major carry transition is located between 1111
1111 1111 1111 and 0000 0000 0000 0000, the internal offset
can be corrected. To adjust the gain error, an analog signal
should be input at either the first code transition (ADC negative
full-scale) or the last code transition (ADC positive full-scale).
Thus, to adjust for full-scale error, an input voltage of 9.999542 V
(FS/2–3/2 LSBs) can be applied to the input and R4 should be
adjusted until the output code flickers between the last positive
code transition 0111 1111 1111 1111 and 0111 1111 1111 1110.
Should the first code transition need adjusting, the trim procedure
should consist of applying an analog input signal of –9.999847 V
(–FS/2 + 1/2 LSB) to the input and adjusting the trim until
the output code flickers between 1000 0000 0000 0000 and
1000 0000 0000 0001.
The external 200
the AD976 provide compensation for an internal adjustment of the
offset and gain which allows calibration with a single supply. These
resistors may not be required in some applications but it should be
noted that their removal will result in offset and gain errors in
addition to those listed in the electrical specifications of the data
sheet. Tables I and II illustrate the worst case range for Bipolar
Zero (offset) error and Full-Scale (gain) error for the AD976 and
the AD976A. All error terms are with respect to the A/D (i.e., a
negative offset in the table would have to be corrected with an
externally applied positive voltage).
AD976/AD976A
Error Term
Offset Error
+Full Scale
Error
–Full Scale
Error
Error Term
Offset Error
+Full Scale
Error
–Full Scale
Error
NOTES
1
2
For A grade part.
For B grade part.
–0.25% < Error < 0.25%
–0.25% < Error < 0.25%
–10 mV < Error < 10 mV
–0.50% < Error < 0.50%
–0.50% < Error < 0.50%
With Both External
Resistors Included
–10 mV < Error < 10 mV
–0.50% < Error < 0.50%
–0.25% < Error < 0.25%
–0.50% < Error < 0.50%
–0.25% < Error < 0.25%
With Both External
Resistors Included
and 33.2K resistor shown in the data sheet for
1
2
1
2
1
2
1
2
Table II. Offset and Gain Error for AD976A
Table I. Offset and Gain Error for AD976
–25 mV < Error < –5 mV
–0.05% < Error < 0.95%
0.25% < Error < 1.25%
Without the External
33.2K Resistor
–25 mV < Error < –5 mV
–0.05% < Error < 0.95%
0.25% < Error < 1.25%
Without the External
33.2K Resistor
–10–
Figure 7. Input Connection with Offset and Gain Adjustment
INPUT
Figure 8. The Bipolar Transfer Characteristic of the
AD976/AD976A
10V
OUTPUT
011...110
CODE
000...001
000...000
111...111
100...010
100...000
011...111
100...001
With the External 33.2K
Resistor Grounded
–25 mV < Error < –5 mV
–0.65% < Error < 0.35%
–0.65% < Error < 0.35%
With the External 33.2K
Resistor Grounded
–25 mV < Error < –5 mV
–0.65% < Error < 0.35%
–0.65% < Error < 0.35%
33.2k
200
R1
R2
0V
V
IN
R3
50k
=
(
(V
AIN(+) - AIN(-)
+5V
REF
50k
/2) – 1 LSB
R4
(V
V
REF
REF
/2
)
/2) + 1 LSB
– INPUT VOLTAGE
576k
Without Either External
Resistors Included
–40 mV < Error < –15 mV
0.55% < Error < 1.90%
–2.5% < Error < –1.0%
Without Either External
Resistors Included
–55 mV < Error < –25 mV
1.0% < Error < 2.50%
–3.50% < Error < –1.75%
2.2 F
R5
2.2 F
C2
C1
FS = V
1LSB =
+ FS – 1 LSB
AGND1
REF
V
REF
CAP
AGND2
65536
IN
FS
AD976/
AD976A
V
REV. C

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