CRD42L51 Cirrus Logic Inc, CRD42L51 Datasheet - Page 61

• Manufacturer Part Number: CRD42L51
• Description: Ref Bd Low-voltage Stereo Codec
• Manufacturer: Cirrus Logic Inc

DS679F1
6.12
Note: The DATA_SEL[1:0] bits in reg09h must be set to ‘01’b to enable function control in this register.
MUTE_ADCMIXx ADCMIXx_VOL6 ADCMIXx_VOL5 ADCMIXx_VOL4 ADCMIXx_VOL3 ADCMIXx_VOL2 ADCMIXx_VOL1 ADCMIXx_VOL0
7
Function:
The level of ADCX can be adjusted in 1.0 dB increments as dictated by the ADCx Soft and Zero Cross bits
(SOFTx & ZCROSSx) from 0 to -96 dB. Levels are decoded in two’s complement, as shown in the table
above.
Note:
ADCx Mixer Volume Control: ADCA (Address 0Eh) & ADCB (Address 0Fh)
ADCX Mixer Channel Mute (MUTE_ADCMIXX)
Default: 1
0 - Disabled
1 - Enabled
Function:
The ADC channel X input to the output mixer will mute when enabled. The muting function is affected by
the DACX Soft and Zero Cross bits (DACX_SZC[1:0]).
ADCX Mixer Volume Control (ADCMIXX_VOL[6:0])
Default = 000 0000
Function:
The level of the ADCX input to the output mixer can be adjusted in 0.5 dB increments as dictated by the
DACX Soft and Zero Cross bits (DACX_SZC[1:0]) from +12 to -51.5 dB. Levels are decoded as shown in
the table above.
Binary Code
001 1000
000 0000
001 1001
111 1111
111 1110
When the ALC is enabled, the Attenuator and PGA volume is automatically controlled and should
not be adjusted manually.
···
···
6
Volume Setting
5
+12.0 dB
-51.5 dB
-0.5 dB
-1.0 dB
0 dB
···
···
4
3
2
1
CS42L51
0
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