CYWUSB6935-48LTXC

CYWUSB6935-48LTXC

Manufacturer Part NumberCYWUSB6935-48LTXC
DescriptionCYWUSB6935-48LTXC
ManufacturerCypress Semiconductor Corp
CYWUSB6935-48LTXC datasheets
 


Specifications of CYWUSB6935-48LTXC

Frequency2.4GHzData Rate - Maximum62.5kbps
Modulation Or ProtocolDSSS, GFSKApplicationsAMR, ISM, RKE
Power - Output0dBmSensitivity-95dBm
Voltage - Supply2.7 V ~ 3.6 VCurrent - Receiving57.7mA
Current - Transmitting69.1mAData InterfacePCB, Surface Mount
Antenna ConnectorPCB, Surface MountOperating Temperature0°C ~ 70°C
Package / Case48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFNOperating Temperature (min)-40C
Operating Temperature (max)85COperating Temperature ClassificationIndustrial
Product Depth (mm)7mmProduct Length (mm)7mm
Operating Supply Voltage (min)2.7VOperating Supply Voltage (typ)3V
Operating Supply Voltage (max)3.6VLead Free Status / RoHS StatusLead free / RoHS Compliant
Memory Size-  
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Features
2.4-GHz radio transceiver
Operates in the unlicensed Industrial, Scientific, and Medical
(ISM) band (2.4 GHz–2.483 GHz)
–95-dBm receive sensitivity
Up to 0dBm output power
Range of up to 50 meters or more
Data throughput of up to 62.5 kbits/sec
Highly integrated low cost, minimal number of external compo-
nents required
Dual DSSS reconfigurable baseband correlators
SPI microcontroller interface (up to 2 MHz data rate)
13-MHz input clock operation
Low standby current < 1 µA
Integrated 30-bit Manufacturing ID
Operating voltage from 2.7V to 3.6V
Operating temperature from –40° to 85°C
Offered in a small footprint 48 QFN
Logic Block Diagram – CYWUSB6935
DIOV A L
DIO
SERDES
IRQ
SS
SCK
Digital
MISO
SERDES
MOSI
RESET
PD
Cypress Semiconductor Corporation
Document #: 38-16008 Rev. *E
WirelessUSB™ LR 2.4 GHz DSSS Radio
Functional Description
The CYWUSB6935 transceiver is a single-chip 2.4 GHz Direct
Sequence Spread Spectrum (DSSS) Gaussian Frequency Shift
Keying (GFSK) baseband modem radio that connects directly to
a microcontroller via a simple serial peripheral interface.
The CYWUSB6935 is offered in an industrial temperature range
48-pin QFN and a commercial temperature range 48-pin QFN.
Applications
Building/Home Automation
Climate Control
Lighting Control
Smart Appliances
On-Site Paging Systems
Alarm and Security
Industrial Control
Inventory Management
Factory Automation
Data Acquisition
Automatic Meter Reading (AMR)
Transportation
Diagnostics
Remote Keyless Entry
Consumer / PC
Locator Alarms
Presenter Tools
Remote Controls
Toys
GFSK
DSSS
Modulator
Baseband
A
A
DSSS
Baseband
GFSK
B
B
Demodulator
Synthesizer
198 Champion Court
San Jose
CYWUSB6935
SoC
RFOUT
RFIN
,
CA 95134-1709
408-943-2600
Revised October 1, 2009
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CYWUSB6935-48LTXC Summary of contents

  • Page 1

    ... The CYWUSB6935 transceiver is a single-chip 2.4 GHz Direct Sequence Spread Spectrum (DSSS) Gaussian Frequency Shift Keying (GFSK) baseband modem radio that connects directly to a microcontroller via a simple serial peripheral interface. The CYWUSB6935 is offered in an industrial temperature range 48-pin QFN and a commercial temperature range 48-pin QFN. Applications ■ ...

  • Page 2

    ... Forty-nine spreading codes selected for optimal performance (Gold codes) are supported across 78 1-MHz channels yielding a theoretical spectral capacity of 3822 channels. The CYWUSB6935 supports a range meters or more. 2.4 GHz Radio The receiver and transmitter are a single-conversion, low-Inter- mediate Frequency (low-IF) architecture with fully integrated IF channel matched filters to achieve high performance in the presence of interference ...

  • Page 3

    ... The Radio Frequency (RF) circuitry has on-chip decoupling capacitors. The CYWUSB6935 is powered from a 2.7V to 3.6V DC supply. The CYWUSB6935 can be shutdown to a fully static state using the PD pin. Below are the requirements for the crystal to be directly connected to X13IN and X13: ■ ...

  • Page 4

    ... DIR INC ISO Document #: 38-16008 Rev. *E [5:0] Address Figure 1. SPI Single Read Sequence Figure 2. SPI Burst Read Sequence Figure 3. SPI Single Write Sequence data from Figure 4. SPI Burst Write Sequence d ata fro from CYWUSB6935 Byte 1+N [7:0] Data Page [+] Feedback ...

  • Page 5

    ... The application MCU samples the DIO and DIOVAL on the rising edge of IRQ. Interrupts The CYWUSB6935 features three sets of interrupts: transmit, received, and a wake interrupt. These interrupts all share a single pin (IRQ), but can be independently enabled/disabled. In transmit mode, all receive interrupts are automatically disabled, and in receive mode all transmit interrupts are automatically disabled ...

  • Page 6

    ... Application Examples Figure 7 shows a block diagram example of a typical battery powered device using the CYWUSB6935 chip. Figure 7. CYWUSB6935 Battery Powered Device LDO/ DC2DC + - Battery Vcc PSoC™ Application 8-bit MCU Hardware ALAR elessU Document #: 38-16008 Rev. *E Figure 8 shows an application example of a WirelessUSB LR alarm system where a single hub node is connected to an alarm panel ...

  • Page 7

    ... Register Descriptions Table 3 displays the list of registers inside the CYWUSB6935 that are addressable through the SPI interface. All registers are read and writable, except where noted. [1] Table 3. CYWUSB6935 Register Map Register Name Revision ID REG_ID Control REG_CONTROL Data Rate REG_DATA_RATE Configuration REG_CONFIG ...

  • Page 8

    ... This bit is reserved and should be written with a zero. 0 Reserved This bit is reserved and should be written with a zero. Document #: 38-16008 Rev. *E REG_ID Description REG_CONTROL Bypass Internal Auto Internal Internal PA Syn Lock PA Enable Signal Disable Description CYWUSB6935 Default: 0x07 1 0 Product ID Default: 0x00 1 0 Reserved Reserved Page [+] Feedback ...

  • Page 9

    ... The following Reg 0x04, bits 2:0 values are not valid: ■ 001–Not Valid ■ 010–Not Valid ■ 011–Not Valid ■ 111–Not Valid Document #: 38-16008 Rev. *E REG_DATA_RATE Code Width Description CYWUSB6935 Default: 0x00 1 0 Data Rate Sample Rate Page [+] Feedback ...

  • Page 10

    ... The EOF event causes data to be moved to the proper SERDES Data Register and can also be used to generate interrupts the EOF length, an EOF condition will occur at the first invalid bit after a valid reception. Document #: 38-16008 Rev. *E REG_CONFIG 4 3 Reserved Description REG_SERDES_CTL 4 3 SERDES Enable Description CYWUSB6935 Default: 0x01 IRQ Pin Select Default: 0x03 EOF Length Page [+] Feedback ...

  • Page 11

    ... A Full A condition occurs when data is transferred from the Channel A Receiver into the Receive SERDES Data A register (Reg 0x09). This could occur when a complete byte is received or when an EOF event occurs whether or not a complete byte has been received. Document #: 38-16008 Rev. *E REG_RX_INT_EN Full B Underflow A Overflow A Description CYWUSB6935 Default: 0x00 1 0 EOF A Full A Page [+] Feedback ...

  • Page 12

    ... TX Enable and RX Enable (Reg 0x03, bits 7:6). For example, the receive status will read 0 if the IC is not in receive mode. These registers are read-only. Document #: 38-16008 Rev. *E [3] REG_RX_INT_STAT Full B Valid A Description CYWUSB6935 Default: 0x00 Flow Violation A EOF A Full A Page [+] Feedback ...

  • Page 13

    ... Therefore not necessary to read the Receive SERDES Valid B register (Reg 0x0C). This register is read-only. Document #: 38-16008 Rev. *E REG_RX_DATA_A Data Description REG_RX_VALID_A Valid Description REG_RX_DATA_B Data Description REG_RX_VALID_B Valid Description CYWUSB6935 Default: 0x00 1 0 Default: 0x00 1 0 Default: 0x00 1 0 Default: 0x00 1 0 Page [+] Feedback ...

  • Page 14

    ... Empty interrupt disabled The Empty condition occurs when the Transmit SERDES Data register (Reg 0x0F) is loaded into the transmit buffer and it's safe to load the next byte Document #: 38-16008 Rev. *E REG_TX_INT_EN Underflow Overflow Description CYWUSB6935 Default: 0x00 1 0 Done Empty Page [+] Feedback ...

  • Page 15

    ... TX Enable and RX Enable (Reg 0x03, bits 7:6). For example, the transmit status will read 0 if the IC is not in transmit mode. These registers are read-only. Document #: 38-16008 Rev. *E [4] REG_TX_INT_STAT 4 3 Underflow Overflow Description CYWUSB6935 Default: 0x00 Done Empty Page [+] Feedback ...

  • Page 16

    ... LSB first. The SERDES will continue to send data until there are no more VALID bits in the shifter. For example, writing 0x0F to the Transmit SERDES Valid register (Reg 0x10) will send half a byte. Document #: 38-16008 Rev. *E REG_TX_DATA 4 3 Data Description REG_TX_VALID 4 3 Valid Description REG_PN_CODE Address 0x17 Address 0x16 Address 0x13 Address 0x12 Description CYWUSB6935 Default: 0x00 Default: 0x00 Default: 0x1E8B6A3DE0E9B222 Address 0x15 ...

  • Page 17

    ... A wakeup event is triggered when the PD pin is deasserted and once the IC is ready to receive SPI communi- cations. Document #: 38-16008 Rev. *E REG_THRESHOLD_L Threshold Low Description REG_THRESHOLD_H Threshold High Description REG_WAKE_EN Reserved Description CYWUSB6935 Default: 0x08 1 0 Default: 0x38 1 0 Default: 0x00 1 0 Wakeup Enable Page [+] Feedback ...

  • Page 18

    ... The application MCU must ensure that this register is modified before transmitting data over the air for the first time. Document #: 38-16008 Rev. *E REG_WAKE_STAT Reserved Description REG_ANALOG_CTL Reserved Reserved PA Output Enable Description REG_CHANNEL Channel Description CYWUSB6935 Default: 0x01 1 0 Wakeup Status Default: 0x00 Invert Reset Default: 0x00 1 0 Page [+] Feedback ...

  • Page 19

    ... The RSSI will collect a single value each time the part is put into receive mode via Control register (Reg 0x03, bit 7=1). See Section for more details. Document #: 38-16008 Rev. *E [6] REG_RSSI RSSI Description REG_PA Description REG_CRYSTAL_ADJ Crystal Adjust Description CYWUSB6935 Default: 0x00 1 0 Default: 0x00 Bias Table 1 for typical output power Default: 0x00 1 0 Page [+] Feedback ...

  • Page 20

    ... Manual Clock Overrides This register must be written with 0x41 after reset for correct operation Document #: 38-16008 Rev. *E REG_VCO_CAL Reserved Description REG_PWR_CTL Reserved Description REG_CARRIER_DETECT Reserved Description REG_CLOCK_MANUAL Manual Clock Overrides Description CYWUSB6935 Default: 0x00 1 0 Default: 0x00 1 0 Default: 0x00 1 0 Default: 0x00 1 0 Page [+] Feedback ...

  • Page 21

    ... Manufacturing ID register (Reg 0x3C-0x3F). This register is read-only. Document #: 38-16008 Rev. *E REG_CLOCK_ENABLE 4 3 Manual Clock Enables Description REG_SYN_LOCK_CNT 4 3 Count Description REG_MID Address 0x3E Address 0x3D Description CYWUSB6935 Default: 0x00 Default: 0x64 ...

  • Page 22

    ... IRQ . Interrupt and SERDES Bypass Mode DIOCLK. N/A Master-Output-Slave-Input Data . SPI data input pin. Hi-Z Master-Input-Slave-Output Data . SPI data output pin. N/A SPI Input Clock . SPI clock. N/A Slave Select Enable . SPI enable 2.7V to 3.6V Ground = Must be tied to Ground. N/A L Must be tied to Ground. CYWUSB6935 Description Page [+] Feedback ...

  • Page 23

    ... RFOUT E-PAD BOTTOM SIDE Document #: 38-16008 Rev. *E Figure 9. CYWUSB6935 48 QFN – Top View CYWUSB6935 Top View CYWUSB6935 6 48 QFN CYWUSB6935 X13IN 34 PACTL X13OUT 25 SCK Page [+] Feedback ...

  • Page 24

    ... –2 2 < V < HIGH [13] to inputs through a series resistor limiting input current to 1 mA. This can’t be done during power down mode. to inputs through a series resistor limiting input current to 1 mA. CYWUSB6935 [9] [10] [12] Min. Typ. Max. Unit 2.7 3.0 3.6 V – 0 ...

  • Page 25

    ... SCK must start low, otherwise the success of SPI transactions are not guaranteed. Document #: 38-16008 Rev. *E Description Figure 10. SPI Timing Diagram fro SCK_LO SCK_H I (BURST READ) th every 9 SCK_HI data DAT_VAL . CC CYWUSB6935 Min. Typ. Max. Unit 476 ns 238 ns 158 ns 158 [16 [16] [16] 77 174 ns [17] ...

  • Page 26

    ... Document #: 38-16008 Rev. *E Description Figure 12. DIO Receive Timing Diagram Figure 13. DIO Transmit Timing Diagram _IR _IR Q _LO data L_H L_S U CYWUSB6935 Min. Typ. Max. Unit 2.1 µs 2.1 µs 0 µs 0 µs 8 µs 16 µs 32 µs 8 µs 16 µs 32 µs –0.01 6.1 µs –0.01 8.2 µ ...

  • Page 27

    ... C = –67 dBm [21 –67 dBm C = –64 dBm Δ 5,10 MHz ± 2 ppm seven steps, monotonic PN Code Pattern 10101010 PN Code Pattern 11110000 100-kHz resolution bandwidth, –6 dBc CYWUSB6935 Min. Typ. Max. Unit 2.400 2.483 GHz –3 ) –86 –95 dBm –20 –7 dBm 28– ...

  • Page 28

    ... Figure 14. Power On Reset/Reset Timing Figure 15. Sleep / Wake Timing t WAKE t t WAKE_INT Figure 15 illustrates a wakeup event configured to trigger an IRQ pin event via the Wake Enable register CYWUSB6935 [27] Min. Typ Max. Unit 2000 µs 1 µs 1300 µs 1 µ ...

  • Page 29

    ... BER Sensitivity vs Vcc @ -45°C -95.0 -95.5 -96.0 -96.5 -97.0 -97.5 -98 2.5 2.7 CYWUSB6935 BER Sensitivity vs Temp GUID: 0x0ECC7E75 3.3 3.7 2 100 Temperature (°C) - Tem perature (°C) LR06 0x0ECC7E75 LR07 0x17D34AAD LR14 0x0DD2E9F8 2.9 3.1 3.3 3.5 3 ...

  • Page 30

    ... Spec M in -0.8 Spec Typ -1 Temp Spec -1.2 -1.4 -1.6 -1 -60 -40 CYWUSB6935 BER Sensitivity vs Vcc @ 90°C LR06 0x0EC C7E75 LR07 0x17D34AAD LR14 0x0DD 2E9F8 2.9 3.1 3.3 3.5 3.7 Vcc Tx Ch40 Output Power LR18 0x17D34E2D 2.6 3.3 3.7 ...

  • Page 31

    ... R1 1071 R2 937 R 500 3.00 CC Ordering Information Part Number Radio CYWUSB6935-48LFXI Transceiver CYWUSB6935-48LFXC Transceiver CYWUSB6935-48LTXI Transceiver CYWUSB6935-48LTXC Transceiver Document #: 38-16008 Rev Test Load OUTPUT 5 pF OUTPUT INCLUDING JIG AND SCOPE Typical V Unit CC 90% Ω 10% Ω GND Ω Rise time: 1 V/ns V THÉ ...

  • Page 32

    ... Package Description Figure 17. 48-pin Lead-Free QFN 7 × LY48 (Punched) The recommended dimension of the PCB pad size for the E-PAD underneath the QFN is 209 mils × 209 mils (width x length). Document #: 38-16008 Rev. *E CYWUSB6935 51-85152 *C Page [+] Feedback ...

  • Page 33

    ... Figure 18. 48-pin QFN 1.0 mm LT48C (Sawn) Document #: 38-16008 Rev. *E CYWUSB6935 001-53698 ** Page [+] Feedback ...

  • Page 34

    ... Document History Page Document Title: CYWUSB6935 WirelessUSB Document Number: 38-16008 Orig. of Submission Revision ECN Change Date ** 207428 TGE 02/27/04 *A 275349 ZTK See ECN *B 291015 ZTK See ECN *C 335774 TGE See ECN *D 391311 TGE See ECN *E 2770967 DPT 09/29/09 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’ ...