DSPIC33FJ64GP706AT-I/MR Microchip Technology, DSPIC33FJ64GP706AT-I/MR Datasheet - Page 114

• Manufacturer Part Number: DSPIC33FJ64GP706AT-I/MR
• Description: 16 Bit MCU/DSP 40MIPS 64KB FLASH 64 QFN 9x9x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP706AT-I/MR

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 7-13:
DS70593B-page 114
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12
bit 11
bit 10-9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
C2RXIE
R/W-0
U-0
—
Unimplemented: Read as ‘0’
DMA5IE: DMA Channel 5 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DCIIE: DCI Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DCIEIE: DCI Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
C2IE: ECAN2 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
C2RXIE: ECAN2 Receive Data Ready Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT4IE: External Interrupt 4 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT3IE: External Interrupt 3 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T9IE: Timer9 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T8IE: Timer8 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
MI2C2IE: I2C2 Master Events Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SI2C2IE: I2C2 Slave Events Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T7IE: Timer7 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT4IE
R/W-0
U-0
—
IEC3: INTERRUPT ENABLE CONTROL REGISTER 3
W = Writable bit
‘1’ = Bit is set
DMA5IE
INT3IE
R/W-0
R/W-0
R/W-0
R/W-0
DCIIE
T9IE
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DCIEIE
R/W-0
R/W-0
T8IE
MI2C2IE
R/W-0
U-0
—
 2009 Microchip Technology Inc.
x = Bit is unknown
SI2C2IE
R/W-0
U-0
—
R/W-0
R/W-0
C2IE
T7IE
bit 8
bit 0