EPC1441LI20 Altera, EPC1441LI20 Datasheet
EPC1441LI20
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EPC1441LI20 Summary of contents
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... MAX+PLUS ® II development systems for Windows-based PCs as well as Sun SPARCstation, and HP 9000 Series 700/800 ■ Programming support with Altera’s Master Programming Unit (MPU) and programming hardware from Data I/O, BP Microsystems, and other manufacturers ■ Available in compact plastic packages (see – ...
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... Configuration Devices (EPC4, EPC8, & EPC16) Data DCLK 20-Pin PLCC EPC1 EPC1441 EPC1213 EPC1064 EPC1064V Sheet N.C. DCLK 2 N.C. 3 VCC N.C. 4 N.C. N.C. 5 N.C. N. N.C. N.C. N. 32-Pin TQFP EPC1441 EPC1064 EPC1064V Altera Corporation Enhanced Note ( N.C. VCC 23 22 N.C. 21 N.C. 20 N.C. N. N.C. 17 N.C. 16 ...
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... N. With SRAM-based devices, configuration data must be reloaded each time the system initializes, or when new configuration data is needed. Altera configuration devices store configuration data for SRAM-based APEX II, APEX 20K, Mercury, ACEX, and FLEX devices. Altera configuration devices. Table 1. Configuration Devices Device 16,000,000 × 1 bit with 3.3-V operation EPC16 8,000,000 × ...
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... Data Size EPC1064 EPC1213 EPC1441 EPC1 EPC2 EPC4 EPC8 EPC16 (bits) EPC1064V 4,714,000 6,276,000 9,612,000 17,390,000 1,297,000 4,383,000 1,964,000 3,901,000 5,564,000 8,938,000 347,000 641,000 1,009,000 1,523,000 1,964,000 2,733,000 3,901,000 5,564,000 8,938,000 12,011,000 985,000 1,950,000 3,878,000 178,000 1 470,000 785,000 1,337,000 Altera Corporation ...
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... EPF6016A EPF6024A FLEX EPF8282A / 8000A EPF8282AV (5.0 V) (3.3 V) EPF8452A EPF8636A EPF8820A EPF81188A EPF1500A Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Data Size EPC1064 EPC1213 EPC1441 EPC1 EPC2 EPC4 EPC8 EPC16 (bits) EPC1064V 470,000 785,000 785,000 1,2000,000 1,336,000 1,840,000 ...
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... CLK Oscillator ENA nRESET Oscillator Control Error Detection Circuitry Register Address CLK Counter ENA nRESET Address Decode Logic EPROM Array DATA Shift Register (1) Address Counter Address Decode Logic EPROM Array DATA Shift nCASC DATA DCLK (2) nCASC DATA (2) Altera Corporation ...
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... Device Configuration Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet The control signals for configuration devices—nCS, OE, and DCLK— interface directly with APEX II, APEX 20K, Mercury, ACEX 1K, and FLEX device control signals. All APEX II, APEX 20K, Mercury, ACEX 1K, and FLEX devices can be configured by a configuration device without requiring an external intelligent controller ...
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... OE, nCS, and DCLK pins supply the control signals for the address counter and the output tri-state buffer. The configuration device sends a serial bitstream of configuration data to its DATA pin, which is routed to the DATA0 or DATA input pin on the LUT-based PLD device. an LUT-based PLD configured with a single EPC2, EPC1, or EPC1441 device. Figure 4 shows Altera Corporation ...
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... APEX 20KE device’s nCONFIG pin and the configuration device’s nINIT_CONF pin. Select a diode with a threshold voltage (V ) less than or equal to 0.7 V. The diode will make the nINIT_CONF pin an open-drain pin; the pin will T only be able to drive low or tri-state. Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Note ( ...
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... If the EPC1 or EPC2 is reset with nCS low, the device initializes as the first device in a configuration chain. If the EPC1 or EPC2 device is reset with nCS high, the device initializes as the subsequent device in the chain. Sheet. Description “Error Detection Circuitry” on page Altera Corporation Enhanced 23. ...
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... TCK (7) – 5 VCCSEL (7) – 14 VPPSEL (7) – 18 VPP Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Notes (1), (2) Pin Type 32-Pin TQFP (4) 15 Output Cascade select output (active low). This output goes low when the address counter has reached its maximum value ...
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... EPC2 or EPC1 devices can be cascaded together. If multiple EPC2 or EPC1 devices are required, the nCASC and nCS pins provide handshaking between the devices. 1 EPC8 and EPC16 configuration devices cannot be cascaded together. The EPC1441 device does not support data cascading. Description Altera Corporation ...
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... Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet When configuring APEX II, APEX 20K, Mercury, ACEX 1K, and FLEX 10K devices with cascaded EPC2 or EPC1 devices, the position of the EPC2 or EPC1 device in the chain determines its operation. Similarly, when configuring FLEX 6000 devices with cascaded EPC1 devices, the position of the EPC1 device in the chain determines its operation ...
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... The nINIT_CONF pin is only available on EPC2 devices and has an internal pull kΩ that is always active. If nINIT_CONF is not available or not used, nCONFIG must be pulled Note ( (2, 3) (2, 3) GND Configuration Configuration Device 1 DCLK DATA DCLK OE DATA nCS nCS nCASC (5) nINIT_CONF (6) OE either directly or through a 1-kΩ resistor. CC Altera Corporation Device 2 ...
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... DCLK MSEL0 DATA0 MSEL1 nSTATUS CONF_DONE nCONFIG GND nCE Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Figure 6 shows two APEX II, APEX 20K, Mercury, ACEX 1K, and FLEX devices configured with two EPC2 or EPC1 devices. Note (1) LUT-Based PLD (3) DCLK MSEL0 ...
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... For more information on APEX 20K, ACEX 1K, FLEX 10K, or FLEX 6000 device configuration, see Application Note 116 (Configuring ACEX 1K, APEX 20K, FLEX 10K & FLEX 6000 Figure 7 shows the timing waveform for the configuration device scheme. t POR DSU Tri-State either directly or through a 1-kΩ resistor. CC Devices User Mode Tri-State (2) Altera Corporation (1) ...
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... Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Table 4 defines the APEX 20K, FLEX 10K, and FLEX 6000 timing parameters when using EPC2 devices at 3.3 V. Table 4. APEX 20K, FLEX 10K & FLEX 6000 Timing Parameters using EPC2 Devices at 3.3 V ...
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... Enhanced Configuration Device (EPC4, EPC8 & EPC16) Data (2) The configuration device imposes a POR delay upon initial power-up to allow the voltage supply to stabilize. Subsequent reconfigurations do not incur this delay. Note (1) Min 100 2 Altera Corporation Max Units 200 250 ns 250 ...
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... Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Table 6 defines the APEX 20K, FLEX 10K, and FLEX 6000 timing parameters when using EPC2, EPC1, and EPC1441 devices at 5.0 V. Table 6. APEX 20K, FLEX 10K & FLEX 6000 Timing Parameters using EPC2, EPC1 & ...
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... The pull-up resistor should be connected to the same supply voltage as the configuration device. (2) All pull-up resistors are 1 kΩ. Figure 9 shows three FLEX 8000 devices configured with two EPC1 or EPC1213 configuration devices. Figure 8 shows a FLEX 8000 device (1) (1) VCC VCC (2) (2) DCLK Configuration Device nCS OE DATA DCLK Altera Corporation ...
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... MSEL0 DCLK DATA0 nCONFIG Notes to Figure 9: (1) The pull-resistor should be connected to the same supply voltage as the confiuration device. (2) All pull-up resistors are 1 kΩ. Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet (1) VCC (1) VCC (2) (2) (1) (1) VCC VCC ...
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... Ground Ground pin. A 0.2-µF decoupling capacitor must be placed between the VCC and GND pins. For more information on FLEX 8000 device configuration, see the following documents: ■ Application Note 33 (Configuring FLEX 8000 Devices) ■ Application Note 38 (Configuring Multiple FLEX 8000 Devices) Description Altera Corporation ...
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... Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet This section describes Power-On Reset (POR) delay, error detection, and 3.3-V and 5.0-V operation of Altera configuration devices. Power-On Reset During initial power-up, a POR delay occurs to permit voltage levels to stabilize. When configuring an APEX II, APEX 20K, Mercury, ACEX 1K, ...
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... Table 8. VCCSEL & VPPSEL Pin Functions on the EPC2 V Voltage Level V Voltage Level CC PP (V) (V) 3.3 3.3 3.3 5.0 5.0 5 and V voltage levels CC PP VCCSEL Pin Logic VPPSEL Pin Logic Level Level High High High Low Low Low Altera Corporation . CC ...
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... Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet For EPC1 and EPC1441 configuration devices, 3.3-V or 5.0-V operation is controlled by a programming bit in the POF. The programming bit value is determined by the core supply voltage of the targeted device during design compilation with the MAX+PLUS II software. For example, EPC1 devices are programmed automatically to operate in 3 ...
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... FLEX 10KE Embedded Programmable Logic Family Data Sheet ■ FLEX 8000 Programmable Logic Device Family Data Sheet ■ FLEX 6000 Programmable Logic Device Family Data Sheet ■ Mercury Programmable Logic Device Family Data Sheet Table 3.3-V Operation 3.3-V 5.0-V Tolerant Tolerant Altera Corporation 9. 3.3-V Tolerant ...
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... Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet The Quartus II and MAX+PLUS II development systems provide programming support for Altera configuration devices. The Quartus II and MAX+PLUS II software automatically generates a POF to program each configuration device in a project multi-device project, the software can combine the programming files for multiple ACEX, APEX, APEX II, FLEX, or Mercury devices into one or more configuration devices ...
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... ISP between multiple PLD vendors. For EPC4, EPC8, and EPC16 JTAG instruction, refer to the Configuration Devices (EPC4, EPC8, & EPC16) Data For more information, see Application Note 39 (IEEE 1149.1 (JTAG) Boundary-Scan Testing in Altera Figure 10 shows the timing requirements for the JTAG signals. Table 10. ...
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... Operating Conditions Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Figure 10. EPC2 JTAG Waveforms TMS TDI t JCP t t JCH JCL TCK t JPZX TDO t JSSU Signal to Be Captured t JSZX Signal to Be Driven Table 11 shows the timing parameters and values for configuration devices. Table 11. JTAG Timing Parameters & ...
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... Min 2.0 –0.3 (6) 2.4 (6) V – 0.2 CC (6) –10 –10 Sheet. Max Unit 7 250 mW 150 ° C 135 ° C 135 ° C Max Unit V 3.6 ( ° ° Max Unit (5) 0 0.4 V µA 10 µA 10 Altera Corporation ...
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... Notes to Tables 12 19: (1) See the Operating Requirements for Altera Devices Data (2) The minimum DC input is –0.3 V. During transitions, the inputs may undershoot to –2 overshoot to 7.0 V for input currents less than 100 mA and periods shorter than 20 ns under no-load conditions. (3) Numbers in parentheses are for industrial-temperature-range devices. ...
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... NRR 32 Tables 20 through 24 show the device configuration parameters for APEX II, APEX 20K, Mercury, ACEX 1K, or FLEX devices. Conditions Conditions Min Typ Max 200 6 100 Min Typ Max 300 100 40 65 100 5 7.7 12 100 Altera Corporation Unit MHz Unit MHz ...
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... CCA f CLK to data enable/disable CDOE t OE low to CLK disable delay OEC t OE low (reset) to nCASC delay NRCAS t OE low time (reset) minimum NRR Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Conditions Conditions Min Typ Max 200 ...
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... Added APEX 20KE device diagrams to EPC1064V EPC1064 EPC1213 Min Max Min Max Min Max 150 100 100 75 240 160 4 6 120 80 120 150 100 150 100 4, 5, and 6. Figures 4 and 6. Altera Corporation EPC1 Unit EPC1441 100 ns 8 MHz 100 100 ns ...
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... Notes: Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet 35 ...
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... Applications Hotline: applications, mask work rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but reserves the right to make changes (800) 800-EPLD to any products and services at any time without notice. Altera assumes no responsibility or ...