EPC1441TI32 Altera, EPC1441TI32 Datasheet - Page 34

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EPC1441TI32

Manufacturer Part Number
EPC1441TI32
Description
Configuration Devices
Manufacturer
Altera
Datasheet

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Configuration Devices for SRAM-based LUT Devices Data Sheet
Revision
History
34
t
t
t
t
t
t
t
t
t
f
t
t
t
t
t
t
t
Symbol
OEZX
CSZX
CSXZ
CSS
CSH
DSU
DH
CO
CK
CK
CL
CH
XZ
OEW
CASC
CKXZ
CEOUT
Table 24. FLEX 8000 Device Configuration Parameters Using EPC1, EPC1441, EPC1213, EPC1064 &
EPC1064V Devices
OE high to DATA output enabled
nCS low to DATA output enabled
nCS high to DATA output disabled
nCS low setup time to first DCLK rising edge
nCS low hold time after DCLK rising edge
Data setup time before rising edge on DCLK
Data hold time after rising edge on DCLK
DCLK to DATA out delay
Clock period
Clock frequency
DCLK low time
DCLK high time
OE low or nCS high to DATA output disabled
OE pulse width to guarantee counter reset
Last DCLK + 1 to nCASC low delay
Last DCLK + 1 to DATA tri-state delay
nCS high to nCASC high delay
Parameter
The information contained in the Configuration Devices for SRAM-Based
LUT Devices Data Sheet version 12.1 supersedes information published in
pervious versions. The following changes were made to the Configuration
Devices for SRAM-Based LUT Devices Data Sheet version 12.1:
Updated
Updated notes to
Added APEX 20KE device diagrams to
Table
2.
Conditions
Figures
4, 5, and 6.
EPC1064V EPC1064
Min Max Min Max Min Max
150
240
120
120
150
75
0
0
100
150
75
75
75
75
90
75
4
Figures 4
100
160
100
EPC1213
50
80
80
0
0
100
75
50
50
50
50
60
50
6
and 6.
Altera Corporation
100
100
EPC1
EPC1441
50
50
50
50
0
0
100
50
50
50
75
50
50
50
8
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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