WM8941GEFL/RV Wolfson Microelectronics, WM8941GEFL/RV Datasheet - Page 86

• Manufacturer Part Number: WM8941GEFL/RV
• Description: Audio CODECs Mono CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8941GEFL/RV

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-28
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8941
w
45 (2Dh)
46 (2Eh)
47 (2Fh)
48 (30h)
49 (31h)
50 (32h)
REGISTER
ADDRESS
0
15:8
7
6
5:0
15:0
15:9
8
7
6:4
3
2:0
15:0
15:2
1
0
15:6
BIT
MICP2INPPGA
INPPGAZC
INPPGAMUTE
INPPGAVOL
PGABOOST
MICP2BOOSTVOL 000
AUX2BOOSTVOL 000
TSDEN
VROI
LABEL
0
1
00h
0
1
010000
0000h
00h
0
0
0
0000h
0000h
0
000h
DEFAULT
Connect input PGA amplifier positive terminal to MICP
or VMID.
0 = input PGA amplifier positive terminal connected to
VMID
1 = input PGA amplifier positive terminal connected to
MICP through variable resistor string
Reserved
Input PGA zero cross enable:
0=Update gain when gain register changes
1=Update gain on 1
write.
Mute control for input PGA:
0=Input PGA not muted, normal operation
1=Input PGA muted (and disconnected from the
following input BOOST stage).
Input PGA volume
000000 = -12dB
000001 = -11.25db
.
010000 = 0dB
.
111111 = 35.25dB
Reserved
Reserved
Input Boost
0 = PGA output has +0dB gain through input BOOST
stage.
1 = PGA output has +20dB gain through input BOOST
stage.
Reserved
Controls the MICP pin to the input boost stage (NB,
when using this path set MICP2INPPGA=0):
000=Path disabled (disconnected)
001=-12dB gain through boost stage
010=-9dB gain through boost stage
…
111=+6dB gain through boost stage
Reserved
Controls the auxiliary amplifier to the input boost
stage:
000=Path disabled (disconnected)
001=-12dB gain through boost stage
010=-9dB gain through boost stage
…
111=+6dB gain through boost stage
Reserved
Reserved
Thermal Shutdown Enable
0 : thermal shutdown disabled
1 : thermal shutdown enabled
VREF (AVDD/2 or 1.5xAVDD/2) to analogue output
resistance
0: approx 1kΩ
1: approx 30 kΩ
Reserved
DESCRIPTION
st
zero cross after gain register
PP, Rev 3.3, December 2007
Input Signal Path
Input Signal Path
Input Signal Path
Input Signal Path
Input Signal Path
Input Signal Path
Input Signal Path
Output Switch
Analogue Outputs
REFER TO
Pre Production
86