DS21455 Maxim Integrated Products, DS21455 Datasheet - Page 30

• Manufacturer Part Number: DS21455
• Description: Network Controller & Processor ICs Quad E1-T1-J1 Single -Chip Transceiver (S
• Manufacturer: Maxim Integrated Products

Specifications of DS21455

• Product: Framer
• Number Of Transceivers: 4
• Data Rate: 64 Kbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 328 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: BGA

W13
W20
M18
PIN
H20
N17
C13
U13
B17
Y15
V19
V18
U10
G17
Y12
D14
U14
B13
A15
R17
C14
D17
V14
L20
F18
T20
T17
W6
J20
M2
M4
M3
D7
V9
A6
U1
N1
K2
G4
N3
A4
N2
K4
A2
B7
B9
C3
T1
E3
B4
F3
F1
J4
J1
RCHBLK1
RCHBLK2
RCHBLK3
RCHBLK4
RCHCLK1
RCHCLK2
RCHCLK3
RCHCLK4
LIUC/TPD
RFSYNC1
RFSYNC2
RFSYNC3
RFSYNC4
ESIBS0_1
ESIBS0_2
ESIBS0_3
ESIBS0_4
ESIBS1_1
ESIBS1_2
ESIBS1_3
ESIBS1_4
ESIBRD1
ESIBRD2
ESIBRD3
ESIBRD4
RCLKO1
RCLKO2
RCLKO3
RCLKO4
RLCLK1
RCLKI3
RD (DS)
MCLK2
RCLKI1
RCLKI2
RCLKI4
MCLK1
RCLK1
NAME
RCLK2
RCLK3
RCLK4
JTCLK
JTRST
DVSS
DVSS
DVSS
DVSS
DVSS
JTDO
JTMS
MUX
JTDI
INT
TYPE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
—
—
—
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
Digital Signal Ground
Digital Signal Ground
Digital Signal Ground
Digital Signal Ground
Digital Signal Ground
JTAG Data Input
Line Interface Connect for All Four Transceivers or Transmit Power-Down Enable
Master Clock for Transceiver 2 and Transceiver 4
Mux Bus Select
Receive Channel Block for Transceiver 3
Receive Channel Clock for Transceiver 1
Receive Channel Clock for Transceiver 3
Receive Link Clock for Transceiver 1
Extended System Information Bus Read for Transceiver 1
Extended System Information Bus Read for Transceiver 2
Extended System Information Bus Read for Transceiver 3
Extended System Information Bus Read for Transceiver 4
Extended System Information Bus 0 for Transceiver 1
Extended System Information Bus 0 for Transceiver 2
Extended System Information Bus 0 for Transceiver 3
Extended System Information Bus 0 for Transceiver 4
Extended System Information Bus 1 for Transceiver 1
Extended System Information Bus 1 for Transceiver 2
Extended System Information Bus 1 for Transceiver 3
Extended System Information Bus 1 for Transceiver 4
Active-Low Interrupt for All Four Transceivers
JTAG Clock
JTAG Data Output
JTAG Test Mode Select
Jtag Reset
Master Clock for Transceiver 1 and Transceiver 3
Receive Channel Block for Transceiver 1
Receive Channel Block for Transceiver 2
Receive Channel Block for Transceiver 4
Receive Channel Clock for Transceiver 2
Receive Channel Clock for Transceiver 4
Receive Clock Output from the Framer on Transceiver 1
Receive Clock Output from the Framer on Transceiver 2
Receive Clock Output from the Framer on Transceiver 3
Receive Clock Output from the Framer on Transceiver 4
Receive Clock Input for the LIU on Transceiver 1
Receive Clock Input for the LIU on Transceiver 2
Receive Clock Input for the LIU on Transceiver 3
Receive Clock Input for the LIU on Transceiver 4
Receive Clock Output from the LIU on Transceiver 1
Receive Clock Output from the LIU on Transceiver 2
Receive Clock Output from the LIU on Transceiver 3
Receive Clock Output from the LIU On Transceiver 4
Active-Low Read Input (Data Strobe)
Receive Frame Sync (Before the Receive Elastic Store) for Transceiver 1
Receive Frame Sync (Before the Receive Elastic Store) for Transceiver 2
Receive Frame Sync (Before the Receive Elastic Store) for Transceiver 3
Receive Frame Sync (Before the Receive Elastic Store) for Transceiver 4
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