LAN91C110-PU SMSC, LAN91C110-PU Datasheet - Page 29

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LAN91C110-PU

Manufacturer Part Number
LAN91C110-PU
Description
Ethernet ICs Non-PCI 10/100 Ethernet MAC
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet

Specifications of LAN91C110-PU

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3
Data Rate
10 MB, 100 MB
Supply Voltage (max)
5 V
Supply Voltage (min)
0 V
Supply Current (max)
40 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN91C110-PU
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
LAN91C110-PU
Manufacturer:
MICROCH
Quantity:
20 000
1. Allocate Command
2. Poll ALLOC_INT bit until set
3. Read Allocation Result Register
ALLOCATED PACKET NUMBER - Packet number associated with the last memory allocation request. The value is only
valid if the FAILED bit is clear.
Note : For software compatibility with future versions, the value read from the ARR after an allocation request is intended
to be written into the PNR as is, without masking higher bits (provided FAILED = 0).
BANK 2
This register provides access to the read ports of the Receive FIFO and the Transmit completion FIFO. The packet
numbers to be processed by the interrupt service routines are read from this register.
REMPTY - No receive packets queued in the RX FIFO. For polling purposes, uses the RCV_INT bit in the Interrupt Status
Register.
TOP OF RX FIFO PACKET NUMBER - Packet number presently at the output of the RX FIFO. Only valid if REMPTY is
clear. The packet is removed from the RX FIFO using MMU Commands 3) or 4).
TEMPTY - No transmit packets in completion queue. For polling purposes, uses the TX_INT bit in the Interrupt Status
Register.
TX FIFO PACKET NUMBER - Packet number presently at the output of the TX FIFO. Only valid if TEMPTY is clear. The
packet is removed when a TX INT acknowledge is issued.
Note: For software compatibility with future versions, the value read from each FIFO register is intended to be written into
the PNR as is, without masking higher bits (provided TEMPTY and REMPTY = 0 respectively).
SMSC LAN91C110 Rev. B
OFFSET
HIGH
BYTE
BYTE
LOW
4
REMPTY
TEMPTY
1
1
FIFO PORTS REGISTER
0
0
0
0
NAME
0
0
DATASHEET
Page 29
FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications
0
0
RX FIFO PACKET NUMBER
TX FIFO PACKET NUMBER
READ ONLY
0
0
TYPE
0
0
0
0
SYMBOL
FIFO
Revision 1.0 (11-04-08)
0
0
Datasheet

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