LAN89218AQ_samples SMSC, LAN89218AQ_samples Datasheet - Page 151

Ethernet ICs High Perform Chip 10/100 NonPCI Cntrl

LAN89218AQ_samples

Manufacturer Part Number
LAN89218AQ_samples
Description
Ethernet ICs High Perform Chip 10/100 NonPCI Cntrl
Manufacturer
SMSC
Datasheet

Specifications of LAN89218AQ_samples

Ethernet Connection Type
10BASE-T, 100BASE-TX
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE802.3, IEEE802.3u
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Performance Single-Chip 10/100 Ethernet Controller for Automotive Applications
Datasheet
SMSC LAN89218
7.7
Crystal Cut
Crystal Oscillation Mode
Crystal Calibration Mode
Frequency
Frequency Tolerance @ 25
Frequency Stability Over Temp
Frequency Deviation Over Time
Total Allowable PPM Budget
Shunt Capacitance
Load Capacitance
Drive Level
Equivalent Series Resistance
Operating Temperature Range
LAN89218 XTAL1/CLKIN Pin
Capacitance
LAN89218 XTAL2 Pin
Capacitance
PARAMETER
The LAN89218 can accept either a 25 MHz crystal (preferred) or a 25 MHz single-ended clock
oscillator ( ± 50 PPM) input. The LAN89218 shares the 25 MHz clock oscillator input (CLKIN) with the
crystal input XTAL1/CLKIN. If the single-ended clock oscillator method is implemented, XTAL2 should
be left unconnected and CLKIN should be driven with a nominal 0 - 3.3 V clock signal. The input clock
duty cycle is 40% minimum, 50% typical and 60% maximum.
It is recommended that a crystal utilizing matching parallel load capacitors be used for the LAN89218
crystal input/output signals (XTAL1, XTAL2). See
crystal specifications. Refer to application note AN10.7 - “Parallel Crystal Circuit Input Voltage Control”
for additional information.
Note 7.11 The maximum allowable values for Frequency Tolerance and Frequency Stability are
Note 7.12 Frequency Deviation Over Time is also referred to as Aging.
Note 7.13 The total deviation for the Transmitter Clock Frequency is specified by IEEE 802.3u as
Note 7.14 This number includes the pad, the bond wire and the lead frame. PCB capacitance is not
Clock Circuit
application dependant. Since any particular application must meet the IEEE ± 50 PPM Total
PPM Budget, the combination of these two values must be approximately ± 45 PPM
(allowing for aging).
± 50 PPM.
included in this value. The XTAL1/CLKIN and XTAL2 pin and PCB capacitance values are
required to accurately calculate the value of the two external load capacitors. These two
external load capacitors determine the accuracy of the 25.000 MHz frequency.
o
C
Table 7.8 LAN89218 Crystal Specifications
SYMBOL
F
F
F
F
P
C
temp
C
R
fund
age
tol
W
O
L
1
DATASHEET
MIN
300
-40
Parallel Resonant Mode
151
Fundamental Mode
AT, typ
Table 7.8, "LAN89218 Crystal Specifications"
± 3 to 5
25.000
20 typ
NOM
7 typ
3 typ
3 typ
MAX
± 50
± 50
± 50
+85
50
UNITS
PPM
PPM
PPM
PPM
MHz
µW
Revision 1.3 (02-23-10)
pF
pF
o
pF
pF
C
Note 7.11
Note 7.11
Note 7.12
Note 7.13
Note 7.14
Note 7.14
NOTES
for

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