72T18125L5BBI Integrated Device Technology (Idt), 72T18125L5BBI Datasheet - Page 14

• Manufacturer Part Number: 72T18125L5BBI
• Description: FIFO Mem Async/Sync Dual Depth/Width Uni-Dir 512K x 18/1M x 9 240-Pin BGA
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 72T18125L5BBI

• Package: 240BGA
• Configuration: Dual
• Bus Directional: Uni-Directional
• Density: 9 Mb
• Organization: 512Kx18|1Mx9
• Data Bus Width: 9/18 Bit
• Timing Type: Asynchronous|Synchronous
• Expansion Type: Depth|Width
• Typical Operating Supply Voltage: 2.5 V
• Operating Temperature: -40 to 85 °C

HSTL
1.5V AC TEST CONDITIONS
NOTE:
1. V
EXTENDED HSTL
1.8V AC TEST CONDITIONS
NOTE:
1. V
2.5V LVTTL
2.5V AC TEST CONDITIONS
NOTE:
1. For LVTTL V
IDT72T1845/55/65/75/85/95/105/115/125 2.5V TeraSync™ 18-BIT/9-BIT FIFO
8Kx9, 8Kx18/16Kx9, 16Kx18/32Kx9, 32Kx18/64Kx9, 64Kx18/128Kx9, 128Kx18/256Kx9, 256Kx18/512Kx9, 512Kx18/1Mx9
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
DDQ
DDQ
= 1.5V±.
= 1.8V±.
CC
= V
DDQ
.
0.25 to 1.25V
GND to 2.5V
0.4 to 1.4V
V
V
V
V
0.4ns
0.4ns
0.75
DDQ
DDQ
DDQ
1ns
0.9
CC
/2
/2
/2
/2
14
Figure 2b. Lumped Capacitive Load, Typical Derating
6
5
4
3
2
1
2Kx18/4Kx9, 4Kx18/
I/O
20 30 50
AC TEST LOADS
Figure 2a. AC Test Load
Capacitance (pF)
Z
0
80 100
= 50
COMMERCIAL AND INDUSTRIAL
Ω
50
TEMPERATURE RANGES
V
Ω
DDQ
FEBRUARY 10, 2009
5909 drw04
/2
5909 drw04a
200