XC3S500E-4FTG256C Xilinx Inc, XC3S500E-4FTG256C Datasheet - Page 43

• Manufacturer Part Number: XC3S500E-4FTG256C
• Description: FPGA Spartan®-3E Family 500K Gates 10476 Cells 572MHz 90nm (CMOS) Technology 1.2V 256-Pin FTBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3Er

Specifications of XC3S500E-4FTG256C

• Package: 256FTBGA
• Family Name: Spartan®-3E
• Device Logic Cells: 10476
• Device Logic Units: 1164
• Device System Gates: 500000
• Number Of Registers: 9312
• Maximum Internal Frequency: 572 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 190
• Ram Bits: 368640
• Number Of Logic Elements/cells: 10476
• Number Of Labs/clbs: 1164
• Total Ram Bits: 368640
• Number Of I /o: 190
• Number Of Gates: 500000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 122-1536 - KIT STARTER SPARTAN-3E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1485

Setting the WRITE_MODE attribute to a value of
NO_CHANGE, puts the DO outputs in a latched state when
asserting WE. Under this condition, the DO outputs retain
DS312-2 (v3.8) August 26, 2009
Product Specification
R
Figure 35: Waveforms of Block RAM Data Operations with NO_CHANGE Selected
ADDR
Data_in
CLK
WE
DO
EN
DI
DISABLED
0000
DI
Internal
Memory
XXXX
aa
READ
MEM(aa)
www.xilinx.com
DO
bb
MEM(bb)=1111
1111
WRITE
the data driven just before WE is asserted. NO_CHANGE
timing is shown in the portion of
is High.
No change during write
2222
cc
MEM(cc)=2222
WRITE
dd
DS312-2_07_020905
XXXX
READ
MEM(dd)
Figure 35
Functional Description
during which WE
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