PI6C2510-133ELEX Pericom Semiconductor, PI6C2510-133ELEX Datasheet - Page 2

• Manufacturer Part Number: PI6C2510-133ELEX
• Description: Phase Locked Loops (PLL) 1:9 Zero Delay Clock Driver
• Manufacturer: Pericom Semiconductor
• Type: Zero Delay PLL Clock Driverr

Specifications of PI6C2510-133ELEX

• Number Of Circuits: 1
• Maximum Input Frequency: 150 MHz
• Minimum Input Frequency: 25 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Package / Case: TSSOP-24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Functions
DC Specifi cations - Absolute maximum ratings over operating free-air temperature range.
Note: Stress beyond those listed under “absolute maximum ratings” may cause permanent damage to the device.
Pin
Name
CLK_IN
FB_IN
G
FB_OUT 12
Y[0:9]
AV
AGND
V
GND
Symbol
V
V
V
I
Power
T
Parameter
I
C
C
O
CC
STG
I
O
CC
I
O
I
_DC
_DC
CC
09-0006
Pin
Number
24
13
11
3, 4, 5, 8,
9, 15, 16,
17, 20,
21
23
1
2, 10, 14,
22
6, 7, 18,
19
Parameter
Input voltage range
Output voltage range
DC input voltage
DC output current
Maximum power dissipation at TA = 59˚C in
still airr
Storage temperature
Test Conditions
V
V
V
I
I
O
= V
= V
= V
CC
CC
Type
I
I
I
O
O
Power
Ground
Power
Ground Ground
CC
or GND
or GND; I
or GND
Description
Reference Clock input. CLK_IN allows spread spectrum.
Feedback input. FB_IN provides the feedback signal to the internal PLL.
Output bank enable. When G is LOW, outputs Y[0:9] are disabled to a logic
low state.
When G is HIGH, all outputs Y[0:9] are enabled.
Feedback output. FB_OUT is dedicated for external feedback.
FB_OUT has an embedded series-damping resistor of same value as clock
outputs Y[0:9].
Clock outputs. These outputs provide low-skew copies of CLK_IN.
Each output has an embedded series-damping resistor.
Analog power supply. AVcc can be also used to bupass the PLL for test
purposes. When AVcc is strapped to ground, PLL is bypassed and CLK_IN
bufferef directly to the device outputs.
Analog ground. AGND provides thr ground referencefor the analog cir-
cuitry/
Power Supply
O
= 0
2
Min.
–0.5
–65
VCC
3.6V
3.3V
Clock Driver with 10 Clock Outputs
Low–noise, Phase –Locked Loop
Min
Max.
V
+5.0
100
1.0
160
CC
+ 0.5
Typ
4
6
PI6C2510-133E
Max
10
PS8505B
Units
V
mA
W
°C
Units
uA
pF
11/18/09