HS1-82C54RH-8 Intersil, HS1-82C54RH-8 Datasheet

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HS1-82C54RH-8

Manufacturer Part Number
HS1-82C54RH-8
Description
Manufacturer
Intersil
Datasheet

Specifications of HS1-82C54RH-8

Lead Free Status / RoHS Status
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Part Number
Manufacturer
Quantity
Price
Part Number:
HS1-82C54RH-8
Manufacturer:
INTERS
Quantity:
227
Part Number:
HS1-82C54RH-8(5962R957130IQJC)
Manufacturer:
MINI
Quantity:
1 400
Radiation Hardened CMOS Programmable
Interval Timer
The Intersil HS-82C54RH is a high performance, radiation
hardened CMOS version of the industry standard 8254 and
is manufactured using a hardened field, self-aligned silicon
gate CMOS process. It has three independently
programmable and functional 16-bit counters, each capable
of handling clock input frequencies of up to 5MHz. Six
programmable timer modes allow the HS-82C54RH to be
used as an event counter, elapsed time indicator, a
programmable one-shot, or for any other timing application.
The high performance, radiation hardness, and industry
standard configuration of the HS-82C54RH make it
compatible with the HS-80C86RH radiation hardened
microprocessor.
Static CMOS circuit design insures low operating power. The
Intersil hardened field CMOS process results in performance
equal to or greater than existing radiation resistant products
at a fraction of the power.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-95713. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.asp
Ordering Information
5962R9571301QJC
5962R9571301QXC
5962R9571301VJC
ORDERING NUMBER
HS1-82C54RH-8
HS9-82C54RH-8
HS1-82C54RH-Q
MKT. NUMBER
TM
INTERNAL
1
1-888-INTERSIL or 321-724-7143
Data Sheet
TEMP. RANGE
-55 to 125
-55 to 125
-55 to 125
(
o
C)
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
|
Intersil and Design is a trademark of Intersil Corporation.
Features
• Electrically Screened to SMD # 5962-95713
• QML Qualified per MIL-PRF-38535 Requirements
• Radiation Performance
• Low Power Consumption
• Pin Compatible with NMOS 8254 and the Intersil 82C54
• High Speed, “No Wait State” Operation with 5MHz
• Three Independent 16-Bit Counters
• Six Programmable Counter Modes
• Binary or BCD Counting
• Status Read Back Command
• Hardened Field, Self-Aligned, Junction Isolated CMOS
• Single 5V Supply
• Military Temperature Range . . . . . . . . . . . -55
- Total Dose. . . . . . . . . . . . . . . . . . . . . 100 krad(Si) (Max)
- Transient Upset . . . . . . . . . . . . . . . . . . . . >10
- Latch Up Free EPI-CMOS
- IDDSB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 A
- IDDOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12mA
HS-80C86RH
Process
August 2000
File Number
|
HS-82C54RH
Copyright © Intersil Corporation 2000
o
C to 125
8
3043.2
rad(Si)/s
o
C

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HS1-82C54RH-8 Summary of contents

Page 1

... Detailed Electrical Specifications for these devices are contained in SMD 5962-95713. A “hot-link” is provided on our homepage for downloading. www.intersil.com/spacedefense/space.asp Ordering Information INTERNAL ORDERING NUMBER MKT. NUMBER 5962R9571301QJC HS1-82C54RH-8 5962R9571301QXC HS9-82C54RH-8 5962R9571301VJC HS1-82C54RH-Q 1 1-888-INTERSIL or 321-724-7143 August 2000 Features • Electrically Screened to SMD # 5962-95713 • ...

Page 2

Pinouts 24 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T24 TOP VIEW CLK 0 9 OUT 0 10 GATE 0 11 GND 12 ...

Page 3

Functional Diagram DATA (8) D7-D0 BUS BUFFER RD READ/ WR WRITE A0 LOGIC A1 CS CONTROL WORD REGISTER AC Test Circuits OUTPUT FROM DEVICE UNDER TEST R2 NOTE: Includes stray and jig capacitance. TEST CONDITION DEFINITION TABLE TEST CONDITION V1 ...

Page 4

Waveforms A0-1 TAVWL CS TSLWL DATA VALID BUS TDVWH WR FIGURE 1. WRITE TRHRL TWHWL RD, WR FIGURE 3. RECOVERY 4 HS-82C54RH A0-1 TWHAX CS RD TWHDX DATA BUS TWLWH TCHCL CLK GATE G OUTPUT 0 TCHGX TAVRL TRHAX TSLRL ...

Page 5

Burn-In Circuits STATIC CONFIGURATION FOR BOTH FLATPACK AND SBDIP PACKAGE OPEN NOTES: 1. VDD = 6. 125 C Minimum A 3. Resistors ...

Page 6

Functional Description General The HS-82C54RH is a programmable interval timer/counter designed for use with microcomputer systems general purpose, multi-timing element that can be treated as an array of I/O ports in the system software. The HS-82C54RH solves ...

Page 7

... Basically, the select inputs A0, A1 connect to the A0, A1 address bus signals of the CPU. The CS can be derived CRL directly from the address bus using a linear select method or it can be connected to the output of a decoder, such as a Intersil HD-6440 for larger systems. CE OLL Operational Description General After power-up, the state of the HS-82C54RH is undefined ...

Page 8

Since the Control Word Register and the three Counter shave separate addresses (selected by the A1, A0 inputs), Control Word Format A1 11 ...

Page 9

A new initial count may be written to a Counter at any time without affecting the Counter’s programmed Mode in anyway. Counting will be affected as described in the Mode definitions. The new count must follow the programmed count format. ...

Page 10

Commands, one for each Counter latched. Each Counter’s latched count is held until it is read (or the Counter is reprogrammed). That Counter is automatically unlatched when read, but other Counters remain latched until they are read. If multiple count ...

Page 11

Write into Counter Write into Counter Write into Counter Write Control Word ...

Page 12

OUT low on the next CLK pulse, thus starting the one-shot pulse N CLK cycles in duration. The one-shot is retriggerable, hence OUT will remain low for N CLK pulses after any trigger. The one-shot pulse can be repeated without ...

Page 13

Numbers below diagrams are count values. The lower number is the least significant byte. The upper number is the most significant byte. Since the Counter is programmed to read/write LSB only, the most significant byte cannot be read. 38. ...

Page 14

LSB = 4 WR CLK GATE OUT LSB = 5 WR CLK GATE OUT ...

Page 15

LSB = 3 WR CLK GATE OUT LSB = 3 WR CLK GATE OUT ...

Page 16

Die Characteristics DIE DIMENSIONS: 4700 m x 5510 m x 485 m 25.4 m INTERFACE MATERIALS: Glassivation: Type: SiO2 Å Å Thickness Top Metallization: Type: Al/Si Å Å Thickness: 11k 2k Metallization Mask Layout D4 (4) D3 (5) ...

Page 17

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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