DA82562ET Intel, DA82562ET Datasheet
DA82562ET
Specifications of DA82562ET
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DA82562ET Summary of contents
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Mbps Platform LAN Connect (PLC) Networking Silicon Product Features IEEE 802.3 10BASE-T/100BASE-TX compliant physical layer interface IEEE 802.3u Auto-Negotiation support Digital Adaptive Equalization control Link status interrupt capability XOR tree mode support 3-port LED support (speed, link and ...
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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel's website at http://www.intel.com. ...
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Contents 1.0 Introduction......................................................................................................................... 1 1.1 Overview ............................................................................................................... 1 1.2 Features ................................................................................................................ 1 1.3 References ............................................................................................................ 1 1.4 Product Code ........................................................................................................2 2.0 82562ET Architectural Overview........................................................................................ 3 3.0 82562ET Signal Descriptions ............................................................................................. 5 3.1 Signal Type Definitions ......................................................................................... 5 3.2 Twisted Pair ...
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Networking Silicon 5.3 Medium Dependent Interface Registers 16 through 31 ...................................... 21 5.3.1 Register 16: PHY Status and Control Register Bit Definitions .............. 21 5.3.2 Register 17: PHY Unit Special Control Bit Definitions ........................... 22 5.3.3 Register 18: ...
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... Platform LAN connect interface support 1.3 References • IEEE 802.3 Standard for Local and Metropolitan Area Networks, Institute of Electrical and Electronics Engineers • 82555 10/100 Mbps LAN Physical Layer Interface Datasheet, Intel Corporation • LAN Connect Interface Specification, Intel Corporation Datasheet Networking Silicon — 82562ET 1 ...
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... Networking Silicon 1.4 Product Code The product ordering code for the 82562ET is: DA82562ET. 2 Datasheet ...
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Architectural Overview The 82562ET is a highly integrated Platform LAN Connect device that combines a 10BASE-T and 100BASE-TX physical layer interfaces. The 82562ET supports a single interface fully compliant with the IEEE 802.3 standard. Figure 1. 82562ET Block ...
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Networking Silicon Figure 2. 82562ET Solution Overview VRM IDE Primary UltraDMA/33 IDE Secondary USB Port 1 USB USB Port 2 AMC97 Audio/ AC97 Link Modem 4 Procesor Clock 2 RIMM MCH Modules PCI Control Bus ICH2 PCI Address/Data ...
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Signal Descriptions 3.1 Signal Type Definitions Type Name I Input O Output I/O Input/Output Multi-level MLT analog I/O B Bias Digital Power DPS Supply Analog Power APS Supply 3.2 Twisted Pair Ethernet (TPE) Pins Pin Pin Name Number ...
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Networking Silicon 3.4 Clock Pins Pin Pin Name Number 3.5 Platform LAN Connect Interface Pins Pin Pin Name Number LAN_CLK 39 LAN_ 42 RSTSYNC LAN_ 45, 44, 43 TXD[2:0] LAN_ 37, 35, 34 RXD[2:0] ...
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LED Pins Pin Pin Name Number LILED# 27 ACTLED# 32 SPDLED# 31 3.7 Miscellaneous Control Pins Pin Pin Name Number ADV10 41 ISOL_TCK 30 ISOL_TI 28 Datasheet Type Description O Link Integrity LED. The LED is active low and ...
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Networking Silicon Pin Pin Name Number ISOL_TEX 29 TOUT 26 TESTEN 21 3.8 Power and Ground Connections Pin Pin Name Number VCC 1, 25 VCCP 36, 40 VCCA 2, VCCA2 7, VCCT 9, 12, 14, 17 VSS 8, ...
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Physical Layer Interface Functionality The 82562ET is designed to work in Data Terminating Equipment (DTE) mode only. It supports a direct glueless interface to all components that comply with the LAN Connect specification. The following figure shows how the ...
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Networking Silicon Symbol 5B Symbol Code 4.1.1.2 100BASE-TX Scrambler and MLT-3 Encoder ...
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When an NRZ “0” arrives at the input of the encoder, the last output level is maintained (either positive, negative or zero). When an NRZ “1” arrives at the input of the encoder, the output steps to ...
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Networking Silicon 4.1.2.2 Receive Clock and Data Recovery The clock recovery circuit uses advanced digital signal processing technology to compensate for various signal jitter causes. The circuit recovers the 125 MHz clock and data and presents the data ...
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Receive Blocks 4.2.2.1 10BASE-T Manchester Decoder The 82562ET performs Manchester decoding and timing recovery in 10BASE-T mode. The Manchester encoded data stream is decoded from the receive differential pair. This data is transferred to the controller at 2.5 ...
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Networking Silicon 4.3 Analog References The 82562ET has two inputs, RBIAS100 and RBIAS10, that require external resistor connections to set biases for its internal analog section. The input pins are sensitive to the resistor value and experimentation is ...
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Dynamic Reduced Power The 82562ET can be configured to support dynamic reduced power. In the dynamic reduced power mode, the 82562ET transitions to reduced power mode when an unplugged state is detected. The 82562ET will only return to full ...
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Networking Silicon 4.6 LAN Connect Interface The 82562ET supports the LAN connect interface as specified in the LAN Connect Interface Specification. The LAN Connect is the I/O Control Hub 2 (ICH2) interface to the 82562ET. The 8- pin ...
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Platform LAN Connect Registers The following subsections describe PHY registers that are accessible through the LAN Connect management frame protocol. Acronyms mentioned in the registers are defined as follows: SC: Self cleared. RO: Read only. RW: Read/Write. E: EEPROM ...
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Networking Silicon Bit(s) Name 10 Isolate 9 Restart Auto- Negotiation 8 Duplex Mode 7 Collision Test 6:0 Reserved 5.1.2 Register 1: Status Register Bit Definitions Bit(s) Name 15 Reserved 14 100BASE-TX Full-duplex 13 100 Mbps Half- duplex 12 ...
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Bit(s) Name 6 Management Frames Preamble Suppression 5 Auto-Negotiation Complete 4 Remote Fault 3 Auto-Negotiation Ability 2 Link Status 1 Jabber Detect 0 Extended Capability 5.1.3 Register 2: PHY Identifier Register Bit Definitions Bit(s) Name 15:0 PHY ID (high byte) ...
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Networking Silicon 5.1.5 Register 4: Auto-Negotiation Advertisement Register Bit Definitions Bit(s) Name 15 Next Page 14 Reserved 13 Remote Fault 12:5 Technology Ability Field 4:0 Selector Field 5.1.6 Register 5: Auto-Negotiation Link Partner Ability Register Bit Definitions Bit(s) ...
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Bit(s) Name 2 Next Page Able 1 Page Received 0 Link Partner Auto- Negotiation Able 5.2 Medium Dependent Interface Registers 8 through 15 Registers eight through fifteen are reserved for IEEE. 5.3 Medium Dependent Interface Registers 16 through 31 5.3.1 ...
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Networking Silicon Bit(s) Name 6:2 PHY Address 1 Speed 0 Duplex Mode 5.3.2 Register 17: PHY Unit Special Control Bit Definitions Bit(s) Name 15 Scrambler By- pass 14 By-pass 4B/5B 13 Force Transmit H- Pattern 12 Force 34 ...
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Bit(s) Name 2 Extended Squelch 1 Link Integrity Disable 0 Jabber Function Disable 5.3.3 Register 18: PHY Address Register Bit(s) Name 15:5 Reserved 4:0 PHY Address 5.3.4 Register 19: 100BASE-TX Receive False Carrier Counter Bit Definitions Bit(s) Name 15:0 Receive ...
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Networking Silicon 5.3.7 Register 22: Receive Symbol Error Counter Bit Definitions Bit(s) Name 15:0 Symbol Error Counter 5.3.8 Register 23: 100BASE-TX Receive Premature End of Frame Error Counter Bit Definitions Bit(s) Name 15:0 Premature End of Frame 5.3.9 ...
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Bit(s) Name 4 Reserved 3 100BASE-TX Receive Jabber Disable 2:0 LED Switch Control Datasheet Networking Silicon — 82562ET Description This bit is reserved and should be set to 0. This bit enables the carrier sense disconnection while the PHY is ...
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Electrical and Timing Specifications 6.1 Absolute Maximum Ratings Maximum ratings are listed below: Case Temperature under Bias . . . . . . . . . . . . . . . . . . . . . . ...
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Networking Silicon 6.2.2 LAN Connect Interface DC Specifications Table 8. LAN Connect Interface DC Specifications Symbol Parameter Input/Output V CCJ Supply Voltage V Input Low Voltage IL Input High V IH Voltage Input Leakage I IL Current Output ...
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Table 11. 10BASE-T Receiver Symbol Parameter Input Differential R ID10 Resistance Input Differential V Accept Peak IDA10 Voltage Input Differential V Reject Peak IDR10 Voltage Input Common V ICM10 Mode Voltage NOTES: 1. The input differential resistance is measured across ...
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Networking Silicon 6.3 AC Characteristics Figure 6 defines the conditions for timing measurements. The design must guarantee proper operation for voltage swings and slew rates that exceed the specified test conditions. Figure 6. AC Test Level Conditions 6.3.1 ...
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Auto-Negotiation Fast Link Pulse (FLP) Timing Parameters Table 15. Fast Link Pulse Timing Parameters Symbol T8 T LP_WID FLP_CLK_CLK T10 T FLP_CLK_DATA T11 T FLP_BUR_NUM T12 T FLP_BUR_WID T13 T FLP_BUR_PER Figure 8. Fast Link Pulse ...
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Networking Silicon 6.3.3 100BASE-TX Transmitter AC Specifications Table 16. 100BASE-TX Transmitter Timing Parameters Symbol T14 T JIT 6.3.4 Reset (RSTSYNC) AC Specifications Table 17. Reset Timing Parameters Symbol T58 T RST_WID T59 T POP_RST Figure 9. Reset Timing ...
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... The 82562ET is a 48-pin Shrink Small Outlying Package (SSOP). The Package dimensions are shown in Figure 10. More information on Intel device packaging is available in the Intel Packaging Handbook, which is available from the Intel Literature Center or your local sales office. Figure 10. Dimension Diagram for the 82562ET 48-pin SSOP Datasheet Networking Silicon — 82562ET ...
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Networking Silicon 7.2 Pinout Information 7.2.1 82562ET Pin Assignments Table 18. 82562ET Pin Assignments Pin Pin Name Number 1 VCC 2 VCCA 3 VSSA 4 RBIAS10 5 RBIAS100 6 VSSA2 7 VCCA2 8 VSS 9 VCCT 10 TDP ...
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Shrink Small Outlying Package Diagram Figure 11. 82562ET Pin Out Diagram VCC (DPS) 1 VCCA (APS) 2 VSSA (APS) 3 RBIAS10 (B) 4 RBIAS100 (B) 5 VSSA2 (APS) 6 VCCA2 (APS VSS (DPS) 9 VCCT (APS) ...
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