1893Y-10 IDT, Integrated Device Technology Inc, 1893Y-10 Datasheet - Page 91

• Manufacturer Part Number: 1893Y-10
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 1893Y-10

• Lead Free Status / RoHS Status: Not Compliant

8.12 Register 17: Quick Poll Detailed Status Register
ICS1893 Rev C 6/6/00
Table 8-18
register used to provide an STA with detailed status of the ICS1893 operations. During reset, it is initialized
to pre-defined default values.
Note:
1. For an explanation of acronyms used in
2. Most of this register’ s bits are latching high or latching low, which allows the ICS1893 to capture and
3. Although some of these status bits are redundant with other management registers, the ICS1893
Table 8-18.
17.15 Data rate
17.14 Duplex
17.13 Auto-Negotiation
17.12 Auto-Negotiation
17.11 Auto-Negotiation
17.10 100Base-TX signal
17.9
17.8
17.7
17.6
17.5
17.4
17.3
17.2
17.1
17.0
Bit
ICS1893 - Release
save the occurrence of an event for an STA to read. (For more information on latching high and
latching low bits, see
provides this group of bits to minimize the number of Serial Management Cycles required to collect the
status data.
Progress Monitor Bit 2
Progress Monitor Bit 1
Progress Monitor Bit 0
lost
100BasePLL Lock
Error
False Carrier detect
Invalid symbol
detected
Halt Symbol detected
Premature End
detected
Auto-Negotiation
complete
100Base-TX signal
detect
Jabber detect
Remote fault
Link Status
lists the bits for the Quick-Poll Detailed Status Register. This register is a 16-bit read-only
Definition
Quick Poll Detailed Status Register (register 17 [0x11])
Section 8.1.4.1, “ Latching High Bits”
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
10 Mbps
Half duplex
Reference Decode Table Reference Decode Table
Reference Decode Table Reference Decode Table
Reference Decode Table Reference Decode Table
Valid signal
PLL locked
Normal Carrier or Idle
Valid symbols observed
No Halt Symbol received
Normal data stream
Auto-Negotiation in
process
No signal present
No jabber detected
No remote fault detected
Link is not valid
When Bit = 0
Table
91
8-18, see
100 Mbps
Full duplex
Signal lost
PLL failed to lock
False Carrier
Invalid symbol received
Halt Symbol received
Stream contained two
IDLE symbols
Auto-Negotiation
complete
Signal present
Jabber detected
Remote fault detected
Link is valid
When Bit = 1
Chapter 1, “ Abbreviations and Acronyms”
and
Section 8.1.4.2, “ Latching Low Bits”
Chapter 8 Management Register Set
cess
Ac-
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
LMX
LMX
LMX
SF
LH
LH
LH
LH
LH
LH
LH
LH
LL
–
–
–
–
fault
De-
June, 2000
–
–
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Hex
.
.)
–
0
0
0