PIC16F1519-E/MV Microchip Technology, PIC16F1519-E/MV Datasheet - Page 159

• Manufacturer Part Number: PIC16F1519-E/MV
• Description: 40-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 2.3V-5.5V 4
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1519-E/MV

• Processor Series: PIC16F151x
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 16 KB
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 2.3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-40
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 5.5 V
• Data Converters: A/D 28x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

18.0
The Timer1 module is a 16-bit timer/counter with the
following features:
• 16-bit timer/counter register pair (TMR1H:TMR1L)
• Programmable internal or external clock source
• 2-bit prescaler
• 32 kHz secondary oscillator circuit
• Optionally synchronized comparator out
• Multiple Timer1 gate (count enable) sources
• Interrupt on overflow
• Wake-up on overflow (external clock,
• Time base for the Capture/Compare function
• Special Event Trigger (with ECCP)
• Selectable Gate Source Polarity
FIGURE 18-1:
 2011 Microchip Technology Inc.
Asynchronous mode only)
From Timer0
From Timer2
T1G
Match PR2
Reserved
Overflow
T1GSS<1:0>
Note 1: ST Buffer is high speed type when using T1CKI.
TIMER1 MODULE WITH GATE
CONTROL
SOSCO/T1CKI
2: Timer1 register increments on rising edge.
3: Synchronize does not operate while in Sleep.
T1OSCEN
T1GPOL
SOSCI
Set flag bit
TMR1IF on
Overflow
00
10
TIMER1 BLOCK DIAGRAM
01
11
TMR1ON
T1GTM
Secondary
Oscillator
TMR1H
EN
OUT
TMR1
(1)
T1G_IN
(2)
D
R
CK
TMR1L
Q
Q
1
0
Preliminary
TMR1CS<1:0>
LFINTOSC
0
1
T1GGO/DONE
Q
Internal
Internal
F
OSC
Clock
Clock
F
OSC
EN
/4
D
• Gate Toggle mode
• Gate Single-pulse mode
• Gate Value Status
• Gate Event Interrupt
Figure 18-1
Single Pulse
Acq. Control
T1CLK
PIC16(L)F1516/7/8/9
11
10
01
00
T1GSPM
T1CKPS<1:0>
T1SYNC
Prescaler
1, 2, 4, 8
TMR1ON
is a block diagram of the Timer1 module.
0
1
To Clock Switching Modules
2
0
1
Internal
F
Clock
T1GVAL
OSC
TMR1GE
/2
Q1
Synchronized
Synchronize
Interrupt
clock input
D
EN
det
det
Sleep input
Q
(3)
DS41452B-page 159
Set
TMR1GIF
T1GCON
Data Bus
RD