PIC16F1519-E/MV Microchip Technology, PIC16F1519-E/MV Datasheet - Page 31

• Manufacturer Part Number: PIC16F1519-E/MV
• Description: 40-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 2.3V-5.5V 4
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1519-E/MV

• Processor Series: PIC16F151x
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 16 KB
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 2.3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-40
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 5.5 V
• Data Converters: A/D 28x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

TABLE 3-5:
40Bh
40Ch
80Bh
80Ch
400h
41Fh
420h
46Fh
470h
47Fh
800h
86Fh
870h
87Fh
Unimplemented
Unimplemented
Core Registers
Common RAM
Core Registers
Common RAM
Read as ‘0’
Read as ‘0’
(Table
70h – 7Fh)
BANK 16
(Table
70h – 7Fh)
(Accesses
(Accesses
BANK 8
80 Bytes
General
Purpose
Register
3-2)
3-2)
PIC16(L)F1518/9 MEMORY MAP (CONTINUED)
48Bh
48Ch
4A0h
4EFh
4FFh
88Bh
88Ch
8EFh
8FFh
480h
49Fh
4F0h
880h
8F0h
Unimplemented
Unimplemented
Core Registers
Common RAM
Core Registers
Common RAM
Read as ‘0’
BANK 17
Read as ‘0’
(Table
70h – 7Fh)
(Table
70h – 7Fh)
(Accesses
(Accesses
BANK 9
80 Bytes
General
Purpose
Register
3-2)
3-2)
50Bh
50Ch
90Bh
90Ch
500h
51Fh
520h
56Fh
570h
57Fh
900h
96Fh
970h
97Fh
Unimplemented
Unimplemented
Core Registers
Core Registers
Common RAM
Common RAM
BANK 10
Read as ‘0’
BANK 18
Read as ‘0’
(Table
70h – 7Fh)
(Table
70h – 7Fh)
(Accesses
(Accesses
80 Bytes
General
Purpose
Register
3-2)
3-2)
58Bh
58Ch
59Fh
5A0h
5EFh
5F0h
5FFh
98Bh
98Ch
9EFh
9F0h
9FFh
580h
980h
Unimplemented
Unimplemented
Core Registers
Core Registers
Common RAM
Common RAM
BANK 11
Read as ‘0’
70h – 7Fh)
BANK 19
Read as ‘0’
70h – 7Fh)
(Table
(Table
(Accesses
(Accesses
Purpose
Register
80 Bytes
General
3-2)
3-2)
A0Ch
60Bh
60Ch
61Fh
64Fh
66Fh
67Fh
A00h
A0Bh
A6Fh
A70h
A7Fh
600h
620h General Purpose
650h
670h
Unimplemented
Unimplemented
Unimplemented
Core Registers
Core Registers
Common RAM
Common RAM
Read as ‘0’
Read as ‘0’
Read as ‘0’
BANK 12
70h – 7Fh)
BANK 20
70h – 7Fh)
(Table
(Accesses
(Table
(Accesses
Register
48 Bytes
3-2)
3-2)
A8Ch
AEFh
AFFh
680h
68Bh
68Ch
69Fh
6A0h
6EFh
6F0h
6FFh
A80h
A8Bh
AF0h
Unimplemented
Unimplemented
Unimplemented
Core Registers
Core Registers
Common RAM
Common RAM
Read as ‘0’
Read as ‘0’
Read as ‘0’
BANK 13
70h – 7Fh)
BANK 21
70h – 7Fh)
(Table
(Accesses
(Table
(Accesses
3-2)
3-2)
B0Bh
B0Ch
700h
70Bh
70Ch
71Fh
720h
76Fh
770h
77Fh
B00h
B6Fh
B70h
B7Fh
Unimplemented
Unimplemented
Unimplemented
Core Registers
Common RAM
Core Registers
Common RAM
Read as ‘0’
Read as ‘0’
Read as ‘0’
BANK 14
(Table
70h – 7Fh)
BANK 22
(Table
70h – 7Fh)
(Accesses
(Accesses
3-2)
3-2)
B8Bh
B8Ch
BEFh
BFFh
780h
78Bh
78Ch
79Fh
7A0h
7EFh
7F0h
7FFh
B80h
BF0h
Unimplemented
Unimplemented
Unimplemented
Core Registers
Common RAM
Core Registers
Common RAM
Read as ‘0’
Read as ‘0’
Read as ‘0’
BANK 15
(Table
70h – 7Fh)
BANK 23
(Table
70h – 7Fh)
(Accesses
(Accesses
3-2)
3-2)