PIC16F1519-E/MV Microchip Technology, PIC16F1519-E/MV Datasheet - Page 46

• Manufacturer Part Number: PIC16F1519-E/MV
• Description: 40-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 2.3V-5.5V 4
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1519-E/MV

• Processor Series: PIC16F151x
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 16 KB
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 2.3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-40
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 5.5 V
• Data Converters: A/D 28x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC16(L)F1516/7/8/9
REGISTER 4-1:
DS41452B-page 46
bit 7
Legend:
R = Readable bit
‘0’ = Bit is cleared
bit 13
bit 12
bit 11
bit 10-9
bit 8
bit 7
bit 6
bit 5
bit 4-3
R/P-1
CP
FCMEN: Fail-Safe Clock Monitor Enable bit
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
IESO: Internal External Switchover bit
1 = Internal/External Switchover mode is enabled
0 = Internal/External Switchover mode is disabled
CLKOUTEN: Clock Out Enable bit
If FOSC Configuration bits are set to LP, XT, HS modes:
All other FOSC modes:
BOREN<1:0>: Brown-out Reset Enable bits
11 = BOR enabled
10 = BOR enabled during operation and disabled in Sleep
01 = BOR controlled by SBOREN bit of the BORCON register
00 = BOR disabled
Unimplemented: Read as ‘1’
CP: Code Protection bit
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
MCLRE: MCLR/V
If LVP bit = 1:
If LVP bit = 0:
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE<1:0>: Watchdog Timer Enable bit
11 = WDT enabled
10 = WDT enabled while running and disabled in Sleep
01 = WDT controlled by the SWDTEN bit in the WDTCON register
00 = WDT disabled
MCLRE
R/P-1
This bit is ignored.
1 = MCLR/V
0 = MCLR/V
This bit is ignored, CLKOUT function is disabled. Oscillator function on the CLKOUT pin.
1 = CLKOUT function is disabled. I/O function on the CLKOUT pin.
0 = CLKOUT function is enabled on the CLKOUT pin
CONFIGURATION WORD 1
WPUE3 bit.
bit 13
P = Programmable bit
‘1’ = Bit is set
PP
PP
PWRTE
FCMEN
PP
R/P-1
R/P-1
pin function is MCLR; Weak pull-up enabled.
pin function is digital input; MCLR internally disabled; Weak pull-up under control of
Pin Function Select bit
R/P-1
R/P-1
IESO
Preliminary
WDTE<1:0>
U = Unimplemented bit, read as ‘1’
-n = Value when blank or after Bulk Erase
CLKOUTEN
R/P-1
R/P-1
R/P-1
R/P-1
BOREN<1:0>
 2011 Microchip Technology Inc.
FOSC<2:0>
R/P-1
R/P-1
R/P-1
U-1
—
bit 8
bit 0