PIC16LF1847-E/ML Microchip Technology, PIC16LF1847-E/ML Datasheet - Page 63

14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan

PIC16LF1847-E/ML

Manufacturer Part Number
PIC16LF1847-E/ML
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet

Specifications of PIC16LF1847-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad
Core
PIC
Processor Series
PIC16LF
Data Bus Width
8 bit
Maximum Clock Frequency
32 MHz
Data Ram Size
256 B
Number Of Programmable I/os
15
Number Of Timers
ÿ4 x 8-bit, 1 x 16-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
Through Hole
Interface Type
SPI, I2C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
5.4
Two-Speed Start-up mode provides additional power
savings by minimizing the latency between external
oscillator start-up and code execution. In applications
that make heavy use of the Sleep mode, Two-Speed
Start-up will remove the external oscillator start-up
time from the time spent awake and can reduce the
overall power consumption of the device. This mode
allows the application to wake-up from Sleep, perform
a few instructions using the INTOSC internal oscillator
block as the clock source and go back to Sleep without
waiting for the external oscillator to become stable.
Two-Speed Start-up provides benefits when the oscil-
lator module is configured for LP, XT or HS modes.
The Oscillator Start-up Timer (OST) is enabled for
these modes and must count 1024 oscillations before
the oscillator can be used as the system clock source.
If the oscillator module is configured for any mode
other than LP, XT or HS mode, then Two-Speed
Start-up is disabled. This is because the external clock
oscillator does not require any stabilization time after
POR or an exit from Sleep.
If the OST count reaches 1024 before the device
enters Sleep mode, the OSTS bit of the OSCSTAT reg-
ister is set and program execution switches to the
external oscillator. However, the system may never
operate from the external oscillator if the time spent
awake is very short.
TABLE 5-1:
 2011 Microchip Technology Inc.
Switch From
Sleep/POR
Sleep/POR
LFINTOSC
Sleep/POR
Any clock source
Any clock source
Any clock source
PLL inactive
Note 1:
Note:
Two-Speed Clock Start-up Mode
PLL inactive.
Executing a SLEEP instruction will abort
the oscillator start-up time and will cause
the OSTS bit of the OSCSTAT register to
remain clear.
OSCILLATOR SWITCHING DELAYS
Switch To
LFINTOSC
MFINTOSC
HFINTOSC
EC, RC
EC, RC
Timer1 Oscillator
LP, XT, HS
MFINTOSC
HFINTOSC
LFINTOSC
Timer1 Oscillator
PLL active
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Preliminary
Frequency
31 kHz
31.25 kHz-500 kHz
31.25 kHz-16 MHz
DC – 32 MHz
DC – 32 MHz
32 kHz-20 MHz
31.25 kHz-500 kHz
31.25 kHz-16 MHz
31 kHz
32 kHz
16-32 MHz
5.4.1
Two-Speed Start-up mode is configured by the
following settings:
• IESO (of the Configuration Word 1) = 1; Inter-
• SCS (of the OSCCON register) = 00.
• FOSC<2:0> bits in the Configuration Word 1
Two-Speed Start-up mode is entered after:
• Power-on Reset (POR) and, if enabled, after
• Wake-up from Sleep.
nal/External Switchover bit (Two-Speed Start-up
mode enabled).
configured for LP, XT or HS mode.
Power-up Timer (PWRT) has expired, or
TWO-SPEED START-UP MODE
CONFIGURATION
Oscillator Warm-up Delay (T
2 cycles
1 cycle of each
1024 Clock Cycles (OST)
2 s (approx.)
1 cycle of each
1024 Clock Cycles (OST)
2 ms (approx.)
Oscillator Delay
PIC16(L)F1847
DS41453B-page 63
WARM
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