PIC18LF13K22-E/SS Microchip Technology, PIC18LF13K22-E/SS Datasheet - Page 32

• Manufacturer Part Number: PIC18LF13K22-E/SS
• Description: 8KB Flash, 256bytes RAM, 256bytes EEPROM, 16MIPS, NanoWatt XLP 20 SSOP .209in TU
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF13K22-E/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F1XK22/LF1XK22
3.2.3
The program memory is addressed in bytes.
Instructions are stored as either two bytes or four bytes
in program memory. The Least Significant Byte (LSB)
of an instruction word is always stored in a program
memory location with an even address (LSb = 0). To
maintain alignment with instruction boundaries, the PC
increments in steps of 2 and the LSb will always read
‘0’ (see Section 3.1.1 “Program Counter”).
Figure 3-4 shows an example of how instruction words
are stored in the program memory.
FIGURE 3-4:
3.2.4
The standard PIC18 instruction set has four two-word
instructions: CALL, MOVFF, GOTO and LSFR. In all
cases, the second word of the instruction always has
‘1111’ as its four Most Significant bits (MSb); the other
12 bits are literal data, usually a data memory address.
The use of ‘1111’ in the 4 MSbs of an instruction
specifies a special form of NOP. If the instruction is
executed in proper sequence – immediately after the
first word – the data in the second word is accessed
EXAMPLE 3-4:
DS41365D-page 32
CASE 1:
Object Code
CASE 2:
Object Code
0110 0110 0000 0000
1100 0001 0010 0011
1111 0100 0101 0110
0010 0100 0000 0000
0110 0110 0000 0000
1100 0001 0010 0011
1111 0100 0101 0110
0010 0100 0000 0000
INSTRUCTIONS IN PROGRAM
MEMORY
TWO-WORD INSTRUCTIONS
Instruction 1:
Instruction 2:
Instruction 3:
INSTRUCTIONS IN PROGRAM MEMORY
TWO-WORD INSTRUCTIONS
Program Memory
Byte Locations
MOVLW
GOTO
MOVFF
Source Code
TSTFSZ
Source Code
MOVFF
ADDWF
TSTFSZ
MOVFF
ADDWF
055h
0006h
123h, 456h

REG1
REG1, REG2 ; No, skip this word
REG3
REG1
REG1, REG2 ; Yes, execute this word
REG3

Preliminary
LSB = 1
; is RAM location 0?
; Execute this word as a NOP
; continue code
; is RAM location 0?
; 2nd word of instruction
; continue code
EFh
C1h
0Fh
F0h
F4h
The CALL and GOTO instructions have the absolute
program
instruction. Since instructions are always stored on word
boundaries, the data contained in the instruction is a
word address. The word address is written to PC<20:1>,
which accesses the desired byte address in program
memory. Instruction #2 in Figure 3-4 shows how the
instruction GOTO
memory. Program branch instructions, which encode a
relative address offset, operate in the same manner. The
offset value stored in a branch instruction represents the
number of single-word instructions that the PC will be
offset by. Section 23.0 “Instruction Set Summary”
provides further details of the instruction set.
and used by the instruction sequence. If the first word
is skipped for some reason and the second word is
executed by itself, a NOP is executed instead. This is
necessary for cases when the two-word instruction is
preceded by a conditional instruction that changes the
PC. Example 3-4 shows how this works.
Note:
LSB = 0
memory
55h
03h
00h
23h
56h
See Section 3.6 “PIC18 Instruction
Execution and the Extended Instruc-
tion Set” for information on two-word
instructions in the extended instruction set.
0006h is encoded in the program
Word Address
address
00000Ah
00000Ch
00000Eh
000000h
000002h
000004h
000006h
000008h
000010h
000012h
000014h
 2010 Microchip Technology Inc.

embedded
into
the