PIC24FV16KA304T-I/ML Microchip Technology, PIC24FV16KA304T-I/ML Datasheet - Page 118

• Manufacturer Part Number: PIC24FV16KA304T-I/ML
• Description: 16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 44 QFN 8x8x0.9mm
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV16KA304T-I/ML

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 16KB (5.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VQFN Exposed Pad
• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FV32KA304 FAMILY
9.1
The system clock source can be provided by one of
four sources:
• Primary Oscillator (POSC) on the OSCI and OSCO
• Secondary Oscillator (SOSC) on the SOSCI and
• Fast Internal RC (FRC) Oscillator
• Low-Power Internal RC (LPRC) Oscillator with two
The primary oscillator and 8 MHz FRC sources have the
option of using the internal 4x PLL. The frequency of the
FRC clock source can optionally be reduced by the pro-
grammable clock divider. The selected clock source
generates the processor and peripheral clock sources.
The processor clock source is divided by two to produce
the internal instruction cycle clock, F
document, the instruction cycle clock is also denoted by
F
be provided on the OSCO I/O pin for some operating
modes of the primary oscillator.
TABLE 9-1:
DS39995B-page 118
8 MHz FRC Oscillator with Postscaler
(FRCDIV)
500 kHz FRC Oscillator with Postscaler
(LPFRCDIV)
Low-Power RC Oscillator (LPRC)
Secondary (Timer1) Oscillator (SOSC)
Primary Oscillator (HS) with PLL Module
(HSPLL)
Primary Oscillator (EC) with PLL Module
(ECPLL)
Primary Oscillator (HS)
Primary Oscillator (XT)
Primary Oscillator (EC)
8 MHz FRC Oscillator with PLL Module
(FRCPLL)
8 MHz FRC Oscillator (FRC)
Note 1:
OSC
pins
SOSCO pins
The PIC24FV32KA304 family devices consist of
two types of secondary oscillator:
- High-Power Secondary Oscillator
- Low-Power Secondary Oscillator
These can be selected by using the SOSCSEL
(FOSC<5>) bit.
- 8 MHz FRC Oscillator
- 500 kHz Lower Power FRC Oscillator
modes:
- High-Power/High Accuracy mode
- Low-Power/Low Accuracy mode
/2. The internal instruction cycle clock, F
2:
CPU Clocking Scheme
OSCO pin function is determined by the OSCIOFNC Configuration bit.
This is the default oscillator mode for an unprogrammed (erased) device.
Oscillator Mode
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
CY
OSC
. In this
Oscillator Source
/2, can
Secondary
Primary
Primary
Primary
Primary
Primary
Internal
Internal
Internal
Internal
Internal
Configuration bit settings are located in the Configuration
chosen by programming these bit locations. The EC
9.2
The oscillator source (and operating mode) that is used
at a device Power-on Reset (POR) event is selected
using
registers in the program memory (For more information,
see
Oscillator
(FOSC<1:0>),
Configuration bits, FNOSC<2:0> (FOSCSEL<2:0>),
select the oscillator source that is used at a POR. The
FRC Primary Oscillator with Postscaler (FRCDIV) is the
default (unprogrammed) selection. The secondary
oscillator, or one of the internal oscillators, may be
mode
POSCFREQ<1:0> (FOSC<4:3>), optimize power
consumption when running in EC mode. The default
configuration is “frequency range is greater than
8 MHz”.
The Configuration bits allow users to choose between
the various clock modes, shown in
9.2.1
The FCKSM Configuration bits (FOSC<7:6>) are used
jointly to configure device clock switching and the
FSCM. Clock switching is enabled only when FCKSM1
is programmed (‘0’). The FSCM is enabled only when
FCKSM<1:0> are both programmed (‘00’).
Section 26.1 “Configuration
POSCMD<1:0>
Configuration
Initial Configuration on POR
frequency
11
11
11
00
10
00
10
01
00
11
11
CLOCK SWITCHING MODE
CONFIGURATION BITS
Configuration
and
the
range
bit
 2011 Microchip Technology Inc.
FNOSC<2:0>
settings.
Initial
111
110
101
100
011
011
010
010
010
001
000
bits,
Configuration
Bits”). The Primary
Table
Oscillator
POSCMD<1:0>
The
9-1.
Notes
oscillator
1, 2
1
1
1
1
1
Select
bits,